Company seeks to build solutions based on open-source processor cores.
One of the lessons learned years ago in the open-source Linux world is that free software isn’t always good enough. Consequently, being able to add commercial value around freeware can turn into a lucrative business.
Red Hat Software, for example, has turned this approach into a thriving multi-billion-dollar business. But nothing comparable has ever succeeded in the SoC world.
Enter SiFive, a startup that has been building customized platforms based on the RISC-V CPU. Started by the creators of the RISC V instruction set architecture (ISA), the company’s stated goal is to shake up the economics of the chip industry.
“There are a lot of customers today without access to silicon today,” said Yunsup Lee, co-founder and CTO of SiFive, and co-designer of the RISC-V ISA at UC Berkeley. “So they use an FPGA or they buy a microcontroller. But there are multiple segments in the fat tail. This is not just a technology play. It’s a fundamental business model issue. If you look at the model that’s being used today, it’s only for the very rich. But it shouldn’t be 1,000 engineers required to build a chip. One engineer should be able to build 1,000 chips.”
Whether those numbers are realistic remains to be seen, but this approach does address a common complaint among fabless companies, namely that developing custom chips is getting too expensive and too time consuming, particularly at leading-edge nodes. At the same time, the IoT is slicing up markets more narrowly than ever before, which increases the demand for more customized chips.
“If you look at all the M&A going on, it does not solve the fundamental problem of how you deal with a market that is more fragmented,” said Jack Kang, SiFive’s vice president of product and business development. “We’re not looking at building chips for cell phone application processors. It’s everything else. Customers buy off-the-shelf FPGAs because they never thought they could get custom silicon.”
SiFive’s approach is to create 80% of the chip ahead of time, including IP, a tool flow, and an existing fab relationship. “We work with companies on the portion that needs customization, but 80% of that is provided freely and openly,” Kang said. “There is already a robust ecosystem in place. That’s how you solve the scaling issue.”
SiFive already has two platforms, one based on a 64-bit processor architecture that is manufactured using TSMCs 28nm process, and a lower-performance 32-bit version that uses the foundry’s 180nm process technology. The faster platform comes with multiple cores, Linux support, while the 32-bit version offers RTOS support. Both offer FPGAs for early development.
Yet lots of companies can do this with old, cheap ARM cores, which are already well-verified. Why take a risk on a new processor core if all you want is some optimized set of peripherals and IO?