Eco-Friendly Strategy


By Jeff Wilson If you want a winning fill solution at 20nm, you need a robust ecosystem in place with three main players. Each player has a specific role and, particularly as the new technology is defined, the players need to work in close partnership. Why is the ecosystem so important at 20nm? Because of the technological challenges, including process variability and design complexity. The... » read more

Mix-And-Match Power Options


By Ann Steffora Mutschler Choices abound today when it comes to considering a node shrink. Fully depleted silicon on insulator (FD-SOI) and finFET technologies along with other advanced transistor options are being evaluated, both together and independently of the other. It is possible to implement finFET on bulk 28nm CMOS or finFET on an FD-SOI process, for example. It is also possible to imp... » read more

To Shrink Or Not To Shrink…And How Much?


By Ann Steffora Mutschler The 28nm semiconductor manufacturing node is in full swing with 20nm process development ramping quickly. As such, the industry has been looking ahead to the next node shrink to achieve the power, performance and cost advantages that a node shrink promises. However, as we are well aware by now, traditional CMOS planar technology is not scaling as it did in previous ge... » read more

Taming The Challenges Of 20nm Custom/Analog Design


Custom and analog designers will lay the foundation for 20nm IC design. However, they face many challenges that arise from manufacturing complexity. The solution lies not just in improving individual tools, but in a new design methodology that allows rapid layout prototyping, in-design signoff, and close collaboration between schematic and layout designers. To view this white paper, click here. » read more

Node Skipping Reaches New Heights


By Mark LaPedus For years, silicon foundries have rolled out their respective leading-edge processes roughly on a two-year cadence. The long-standing goal has been to keep foundry customers on a competitive price, power and performance curve. But as leading-edge chipmakers move from the 28nm node and beyond, the predictable process progression is changing. And the phenomenon of “node skip... » read more

Power Impacts On Advanced Node IP


By Ann Steffora Mutschler With the move to the 28nm or 20nm process nodes, SoC engineering teams are seeing a significant amount of variations due to manufacturability. To reflect how a design element will be printed on the wafer, foundries offer many libraries with multiple corners for different voltages, timing and temperature, among other things. “At 28nm what we are seeing is a l... » read more

Design Solutions For 20nm And Beyond


The consumer’s insatiable demand for greater performance, a shrinking form factor and extended battery life, all while continuing the trend for lower end user cost is the driving force behind the semiconductor industry’s rapid evolution to ever smaller process geometries. As with many of the previous process geometry shrinks, there will be the usual concerns about the increase in design ... » read more

ST’s FD-SOI Tech Available to All Through GF


Posted by Adele Hars, Editor-in-Chief, Advanced Substrate News ~  ~ In the spring of 2012, STMicroelectronics announced the company would be manufacturing ST-Ericsson’s next-generation (and very successful) NovaThor ARM-based smartphone/tablet processors using 28nm FD-SOI process technology. With first samples coming out this fall, ASN talks to Jean-Marc Chery, Executive Vice Pres... » read more

SPOTLIGHT ON FD-SOI, FINFETS AT IEEE SOI CONFERENCE
;1-4 OCT, NAPA


The 38th annual SOI Conference is coming right up. Sponsored by IEEE Electron Devices Society, this is the only dedicated SOI conference covering the full technology chain from materials to devices, circuits and system applications. Chaired this year by Gosia Jurczak (manager of the Memories Program at imec), this excellent conference is well worth attending. It’s where the giants of the ... » read more

Power And Performance: GSS Sees SOI Advantages For FinFETs


Are FinFETs better on SOI? In a series of papers, high-profile blogs and subsequent media coverage,Gold Standard Simulations (aka GSS) has indicated that, yes, FinFETs should indeed be better on SOI. To those of us not deeply involved in the research world, much of this may seem to come out of nowhere.  But there’s a lot of history here, and in this blog we’ll take a look at what it’s... » read more

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