One-On-One: Dave Hemker


Semiconductor Engineering sat down to discuss process technology, transistor trends and other topics with Dave Hemker, senior vice president and chief technology officer at [getentity id="22820" comment="LAM Research"]. SE: On the technology front, the IC industry is undergoing some new and dramatic changes. What are some of those changes? Hemker: We focus on what we call the inflections.... » read more

Still Waiting For III-V Chips


For years, chipmakers have been searching for an alternative material to replace traditional silicon in the channel for advanced CMOS devices at 7nm and beyond. There’s a good reason, too: At 7nm, silicon will likely run out of steam in the channel. Until recently, chipmakers were counting on III-V materials for the channels, at least for NFET. Compared to silicon, III-V materials provide ... » read more

Darker Silicon


For the last several decades, integrated circuit manufacturers have focused their efforts on [getkc id="74" comment="Moore's Law"], increasing transistor density at constant cost. For much of that time, Dennard’s Law also held: As the dimensions of a device go down, so does power consumption. Smaller transistors ran faster, used less power, and cost less. As most readers already know, howe... » read more

Next Channel Materials?


Chipmakers are making a giant leap from planar transistors to [getkc id="185" kc_name="finFETs"]. Initially, [getentity id="22846" e_name="Intel"] moved into finFET production at 22nm and is now ramping up its second-generation finFETs at 14nm. And the other foundries will enter the finFET fray at 16nm/14nm. So what’s next? Chipmakers will likely extend the finFET architecture to both 10nm... » read more

One-On-One: Aaron Thean


Semiconductor Engineering sat down to discuss process technology, transistor trends and other topics with Aaron Thean, vice president of process technologies and director of the logic devices R&D program at Imec. SE: Chipmakers are ramping up the 16nm/14nm logic node, with 10nm and 7nm in R&D. What’s the current timeline for 10nm and 7nm? Thean: 10nm is on its way. We will see r... » read more

Unraveling The Mysteries At IEDM


In some respects, the 2014 IEEE International Electron Devices Meeting (IEDM) was no different than past events. The event, held this week in San Francisco, included the usual and dizzying array of tutorials, sessions, papers and panels. On the leading-edge CMOS front, for example, the topics included [getkc id="82" kc_name="2.5D"]/[getkc id="42" kc_name="3D IC"] chips, III-V materials, [getkc ... » read more

And the Winner is…


Semiconductor Engineering now has its first full year under its belt, and I have to say it has been an incredible year. Not only did we exceed a million page views in our first year, but we also got started on the Knowledge Center, an endeavor the likes of which has never been attempted in our industry. It is still very young and has a lot of growing up to do, but it is a wonderful start. We wo... » read more

Photoresist Problems Ahead


As the semiconductor industry begins its ramp to manufacturing at 10nm and below, activity is heating up involving lithography modeling. The goal is to be ready when all the pieces of the puzzle are in place. That includes [gettech id="31045" comment="EUV"], when it finally becomes commercially viable, as well as extending ArF [getkc id="80" comment="lithography"]. When it comes to lithogra... » read more

Transistor Options Narrow For 7nm


Chipmakers are currently ramping up silicon-based finFETs at the 16nm/14nm node, with plans to scale the same technology to 10nm. Now, the industry is focusing on the transistor options for 7nm and beyond. At one time, the leading contenders involved several next-generation transistor types. At present, the industry is narrowing down the options and one technology is taking a surprising lea... » read more

Re-Engineering The FinFET


The semiconductor industry is still in the early stages of the [getkc id="185" kc_name="finFET"] era, but the [getkc id="26" kc_name="transistor"] technology already is undergoing a dramatic change. The fins themselves are getting a makeover. In the first-generation finFETs, the fins were relatively short and tapered. In the next wave, the fins are expected to get taller, thinner and more re... » read more

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