Week In Review: Auto, Security, Pervasive Computing


Automotive, mobility Qualcomm completed its acquisition of Arriver Business from SSW Partners. Arriver’s Driver Assistance, Computer Vision, and Drive Policy assets will become part of the Snapdragon Ride Platform. SSW Partners, a New York-based investment partnership, has acquired all shares in Veoneer, retaining its Tier-1 supplier and integrator businesses. Hyundai Motor Group gave Inf... » read more

Embedded Intelligent Edge For Predictive Maintenance


Historically in a full-scale production setting, one of the best company assets was the experience of machine operators, as they had the ability to predict when maintenance was required. Plant managers reported about any unusual behavior such as a clatter or clank in the machinery, prompting a check-up by the maintenance crew. Today, the level of automation greatly reduces the operator’s abil... » read more

Weather Research And Forecasting On Amazon EC2 Hpc6a Instances Featuring AMD EPYC 7003 Series Processors


The Weather Research and Forecasting Model is a popular mesoscale numerical weather prediction system designed for both atmospheric research and operational forecasting applications. It features two dynamical cores, a data assimilation system, and a software architecture supporting parallel computation and system extensibility. Click here to read more. » read more

Week In Review: Design, Low Power


Design services firm SemiFive acquired Analog Bits, a provider of low-power mixed-signal IP. Analog Bits' portfolio includes precision clocking macros, I/Os, SerDes, and sensors to monitor PVT. It was founded in 1995 and based in Sunnyvale, California. “Analog Bits has a solid track record of developing and delivering differentiated and high-quality mixed signal IP addressing multiple market ... » read more

Chiplets Enter The Supercomputer Race


Several entities from various nations are racing each other to deliver and deploy chiplet-based exascale supercomputers, a new class of systems that are 1,000x faster than today’s supercomputers. The latest exascale supercomputer CPU and GPU designs mix and match complex dies in advanced packages, adding a new level of flexibility and customization for supercomputers. For years, various na... » read more

Why Comparing Processors Is So Difficult


Every new processor claims to be the fastest, the cheapest, or the most power frugal, but how those claims are measured and the supporting information can range from very useful to irrelevant. The chip industry is struggling far more than in the past to provide informative metrics. Twenty years ago, it was relatively easy to measure processor performance. It was a combination of the rate at ... » read more

Robots Become More Useful In Factories


Most people associate factory automation with large robotic machines, such as those that weld automobile chassis on assembly lines. But as prices drop and technology improves, robots are being deployed for smaller and more varied tasks, and they are getting better at all of them. Inside of factories, robots can significantly improve output, consistency, and reliability. They can work around ... » read more

Week In Review: Manufacturing, Test


Packaging ASE, AMD, Arm, Google, Intel, Meta, Microsoft, Qualcomm, Samsung, and TSMC have announced the formation of a consortium that will establish a die-to-die interconnect standard and foster an open chiplet ecosystem. The founding companies also ratified the UCIe specification, an open industry standard developed to establish a standard interconnect at the package level. The UCIe 1.0 s... » read more

Week In Review: Design, Low Power


Tools & IP Imperas Software introduced the RISC-V Verification Interface (RVVI). The open standard and methodology can be adapted to any configuration permitted within the RISC-V specifications. RVVI defines interfaces between RTL, reference model, and testbench for RISC-V design verification, with the aim of making RISC-V processor DV reusable. It supports multi-hart, superscalar, and out... » read more

Machine Learning Showing Up As Silicon IP


New machine-learning (ML) architectures continue to appear. Up to now, each new offering has been implemented in a chip for sale, to be placed alongside host processors, memory, and other chips on an accelerator board. But over time, more of this technology could be sold as IP that can be integrated into a system-on-chip (SoC). That trend is evident at recent conferences, where an increasing... » read more

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