Building Complex Chips That Last Longer


Semiconductor Engineering sat down to talk about design challenges in advanced packages and nodes with John Lee, vice president and general manager for semiconductors at Ansys; Shankar Krishnamoorthy, general manager of Synopsys' Design Group; Simon Burke, distinguished engineer at Xilinx; and Andrew Kahng, professor of CSE and ECE at UC San Diego. This discussion was held at the Ansys IDEAS co... » read more

Data Tsunami Pushes Boundaries Of IC Interconnects


Rapid increases in machine-generated data are fueling demand for higher-performance multi-core computing, forcing design teams to rethink the movement of data on-chip, off-chip, and between chips in a package. In the past, this was largely handled by the on-chip interconnects, which often were a secondary consideration in the design. But with the rising volumes of data in markets ranging fro... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive Arm announced a new software architecture, two reference hardware implementations, and its role leading a new industry group that will work on open-source software for automotive use. The Scalable Open Architecture for Embedded Edge (SOAFEE) is based on Arm’s Project Cassini and SystemReady, aims to help the automotive industry move to software-defined systems by tackling the comp... » read more

System-In-Package Thrives In The Shadows


IC packaging continues to play a big role in the development of new electronic products, particularly with system-in-package (SiP), a successful approach that continues to gain momentum — but mostly under the radar because it adds a competitive edge. With a SiP, several chips and other components are integrated into a package, enabling it to function as an electronic system or sub-system. ... » read more

Week In Review: Design, Low Power


Tools & IP Cadence and Samsung Foundry are offering Mixed-Signal OpenAccess-ready process design kit (PDK) technology files that support a range of Samsung process technologies from 28FDS to GAA base 3nm. Enabling access to mixed-signal designs in a common OpenAccess database, the co-design methodology promotes shared responsibilities and collaboration between the analog and digital teams ... » read more

The Next Generation Of General-Purpose Compute At Hot Chips


At the recent HOT CHIPS, the first day opened with the chips that you first think of when you hear the word processor. These are the next generation of chips from the likes of Intel, AMD, and IBM. There were lots of other chips too, such as Arm's Neoverse N2, and NVIDIA's new data-processing unit (DPU), or AMD's next-generation graphics architecture. But for this post, anyway, I'm going to focu... » read more

New Approaches For Processor Architectures


Processor vendors are starting to emphasize microarchitectural improvements and data movement over process node scaling, setting the stage for much bigger performance gains in devices that narrowly target what end users are trying to accomplish. The changes are a recognition that domain specificity, and the ability to adjust or adapt designs to unique workloads, are now the best way to impro... » read more

Week In Review: Manufacturing, Test


Chipmakers Intel has outlined its new process technology roadmap with plans to regain the leadership position in the market. As part of the move, Intel has changed the way it designates the nodes, revealed its new gate-all-around (GAA) transistor, and disclosed a customer for the GAA technology--Qualcomm. And not to be outdone, Intel has broadened its packaging portfolio. Intel is changing ... » read more

Sweeping Changes Ahead For Systems Design


Data centers are undergoing a fundamental change, shifting from standard processing models to more data-centric approaches based upon customized hardware, less movement of data, and more pooling of resources. Driven by a flood of web searches, Bitcoin mining, video streaming, data centers are in a race to provide the most efficient and fastest processing possible. But because there are so ma... » read more

Piecing Together Chiplets


Several companies are implementing the chiplet model as a means to develop next-generation 3D-like chip designs, but this methodology still has a long way to go before it becomes mainstream for the rest of the industry. It takes several pieces to bring up a 3D chip design using the chiplet model. A few large players have the pieces, though most are proprietary. Others are missing some key co... » read more

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