tag: Accellera

Blog Review: Aug. 30
By Jesse Allen - 30 Aug, 2017 - Comments: 0

Cadence's Meera Collier explains machine learning, unsupervised algorithms, and why Facebook's recently publicized AI chatbot conversation isn't as inscrutable as it sounds. Synopsys' Robert Vamosi considers recently proposed legislation which seeks to mitigate the risk of botnets commandeering IoT devices used in the U.S. government, including limiting the use of hard-coded passwords and ce... » read more

The Week In Review: Design
By Jesse Allen - 25 Aug, 2017 - Comments: 0

Tools Ansys updated its simulation suite, improving the speed of PCB and electronic package simulation as well as integrating its embedded systems tool with its failure analysis capabilities. Other updates include a new visual ray tracing capability to aid in antenna placement, improved modeling of the quality of wireless links in the presence of electromagnetic interference and RF interferenc... » read more

Portable Stimulus Status Report
By Brian Bailey - 24 Aug, 2017 - Comments: 0

The first release of the Portable Stimulus (PS) standard is slated for early next year. If it lives up to its promise, it could be the first new language and abstraction for verification in two decades. [getentity id="22028" e_name="Accellera"] uncorked the PS Early Adopter release at the Design Automation Conference (DAC) in June. The standard has been more than two years in the making by t... » read more

Blog Review: Aug. 23
By Jesse Allen - 23 Aug, 2017 - Comments: 0

Cadence's Madhavi Rao asks whether India should have more fabs and the role government policy should play. Synopsys' Kapil Rajpal checks out the Serial Peripheral Interface, which is emerging as a popular choice in automotive applications, and various vendor specific flavors. In a video, Mentor's Colin Walls explains inter-task communication and the basic mechanisms of how to pass data fr... » read more

Verification Unification
By Brian Bailey - 03 Jul, 2017 - Comments: 0

Semiconductor Engineering brought together industry luminaries to initiate the discussion about the role that formal technologies will play with the recently released early adopter's draft of Portable Stimulus and how it may help to bring the two execution technologies closer together. Participating in this roundtable are Joe Hupcey, verification product technologist for [getentity id="22017" e... » read more

Hybrid Emulation
By Brian Bailey - 29 Jun, 2017 - Comments: 0

Semiconductor Engineering sat down to discuss the growing usage of hybrid verification approaches with Frank Schirrmeister, senior group director of product management & marketing for [getentity id="22032" e_name="Cadence"]; Russ Klein, program director for pre-silicon debug products at [getentity id="22017" e_name="Mentor, a Siemens Business"]; [getperson id="11027" comment="Phil Moorby"],... » read more

Verification Unification
By Brian Bailey - 22 Jun, 2017 - Comments: 0

Semiconductor Engineering brought together industry luminaries to initiate the discussion about the role that formal technologies will play with Portable Stimulus and how it may help to bring the two execution technologies closer together. Participating in this roundtable are Joe Hupcey, verification product technologist for [getentity id="22017" e_name="Mentor, a Siemens Business"]; Tom Fitzpa... » read more

Tuesday At DAC
By Brian Bailey - 21 Jun, 2017 - Comments: 0

Accellera got everyone out of bed early this morning to talk about the just announced early access release of Portable Stimulus. The panel was made up with people from user companies. Semiconductor Engineering will be providing full coverage of this event, but perhaps the important message is that the panelists were eager to get adoption within their companies but knew that there would be chall... » read more

The Week In Review: Design
By Jesse Allen - 16 Jun, 2017 - Comments: 0

M&A Verific acquired Invionics' entire INVIO technology portfolio, adding a high-level scripting interface with 100 high-level APIs to its Parser Platform of approximately 2,000 low-level SystemVerilog and VHDL APIs. An R&D group from the company will also join Verific. Portable Stimulus An Early Adopter release of the Portable Stimulus specification has been made publicly availabl... » read more

Safety Plus Security: A New Challenge
By Brian Bailey - 08 Jun, 2017 - Comments: 0

Nobody has ever integrated safety or security features into their design just because they felt like it. Usually, successive high-profile attacks are needed to even get an industry's attention. And after that, it's not always clear how to best implement solutions or what the tradeoffs are between cost, performance, and risk versus benefit. Putting safety and security in the same basket is a ... » read more

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