Automotive Growing In 2023


Automotive has to be one of the most fascinating industries where semiconductors and the semiconductor ecosystem are making huge strides. From the evolution of increasingly autonomous vehicles, to more immersive driver and passenger comfort and infotainment experiences, along with additional safety-related features, it’s a rich development environment. I recently had the opportunity to dis... » read more

Building Better Cars Faster


Carmakers are accelerating their chip and electronic design schedules to remain competitive in an increasingly fast-changing market, but they are encountering gaps in the tooling, the supply chain, and in the methodologies they use to create those cars. While it's easy to envision how CAD software could be used to create the next new vehicle’s 3-D look, and how simulation software helps de... » read more

Solving Problems With The IoT


The Internet of Things, a term once applied to almost any "smart" gadget connected to the Internet, is becoming more useful, more complex, and more of a security risk as the value of data continues to grow and more people depend on IoT technology. In the decades since the concept was first introduced, IoT devices have become so ubiquitous that applications cover practically every consumer, c... » read more

Automotive Security Vulnerabilities From Afar


Don't confuse automotive security with automotive safety, things like functional safety (FuSa) and ISO 26262. You need security to have safety. But security is its own thing. In a modern connected car, there are two places for security vulnerabilities. One is in the car itself. And the other is back at base in the automotive manufacturer's (OEM in the jargon) data centers, which the cars are co... » read more

Blog Review: Feb. 1


Siemens EDA's Harry Foster explores trends in low power design techniques for ICs and ASICs, with 72% of design projects reported actively managing power. Synopsys' Charlie Matar, Rita Horner, and Pawini Mahajan look at the concept of reliability, availability, and serviceability (RAS) in the context of high-performance computing SoC designs and how it can be supported with silicon lifecycle... » read more

Week In Review: Auto, Security, Pervasive Computing


The U.S. Department of Defense updated the directive that governs the development and fielding of autonomous and semi-autonomous weapon systems. The revisions include an expanded focus on artificial intelligence, and reference to recently-established organizations like the DoD’s Chief Digital and Artificial Intelligence Office. NIST released a new guidance document aimed at helping organi... » read more

Week In Review: Design, Low Power


Electronic system design (ESD) industry revenue is up 8.9% from $3,458.2 million in Q3 2021 to $3,767.4 million in Q3 2022 according to a report from SEMI’s ESD Alliance. Read our in-depth take on what this means. In an attempt to make a viable reusable DNA biosensor probe, NIST researchers used an extremely low-power FETdeveloped at CEA-LETI to remove noise in their DNA biosensor circuitr... » read more

IEDM: TSMC N3 Details


I attended IEDM in San Francisco in December. There were two presentations about TSMC's N3 process. This is actually a bit of a misnomer since TSMC has two N3 processes, one simply called N3. The other (the second generation) is called N3E. The two papers were: Critical Process Features Enabling Aggressive Contacted Gate Pitch Scaling for 3nm CMOS Technology and Beyond A 3nm CMOS FinFl... » read more

Power Issues Causing More Respins At 7nm And Below


Power consumption has been a major design consideration for some time, but it is far from being a solved issue. In fact, an increasing number of designs have a plethora of power-related problems, and those problems are getting worse in new chip designs. Many designs today are power-limited — or perhaps more accurately stated, thermal-limited. A chip only can consume as much power as it is ... » read more

CXL Picks Up Steam In Data Centers


CXL is gaining traction inside large data centers as a way of boosting utilization of different compute elements, such as memories and accelerators, while minimizing the need for additional racks of servers. But the standard is being extended and modified so quickly that it is difficult to keep up with all the changes, each of which needs to be verified and validated across a growing swath of h... » read more

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