Performance & Efficiency Cores For Servers


HotChips 2023 was held August 27-29, 2023 at Stanford University in California and was the first in-person version of the conference in 4 years. The conference was held in a hybrid format that had over 500 participants in-person and over 1,000 attending virtually online. Topics covered a broad range of advancements in computing, connectivity, and computer architecture. Both AMD and Intel gav... » read more

Need To Share Data Widens In IC Manufacturing


Experts at the Table: Semiconductor Engineering sat down to discuss issues in smart manufacturing of chips, including data management and grounding, chiplets, and standards, with Mujtaba Hamid, general manager for product management for secure cloud environments at Microsoft; Vijaykishan Narayanan, vice president and general manager of India engineering and operations at proteanTecs; KT Moore,... » read more

Week In Review: Design, Low Power


Arm filed its registration statement for a highly anticipated IPO. Chip industry heavyweights Apple, Samsung, NVIDIA, and Intel are all expected to invest. Find the SEC filing here. Taiwan’s National Science and Technology Council (NSTC) laid out a 10-year initiative to bolster its IC design market share to 40% worldwide by 2033, with the first year’s budget of US $376 million. The sh... » read more

Preparing For Commercial Chiplets


Experts at the Table: Semiconductor Engineering sat down to discuss the path to commercialization of chiplets with Saif Alam, vice president of engineering at Movellus; Tony Mastroianni, advanced packaging solutions director at Siemens Digital Industries Software; Mark Kuemerle, vice president of technology at Marvell; and Craig Bishop, CTO at Deca Technologies. What follows are excerpts of tha... » read more

Stop-For-Top IP Model To Replace One-Stop-Shop By 2025… And Support The Creation Of Successful Chiplet Business


The One-Stop-Shop model has allowed IP vendors of the 2000’s to create a successful IP business, mostly driven by consumer application, smartphone or Set-Top-Box. The industry has dramatically changed, and in 2020 is now driven by data-centric application (datacenter, AI, networking, HPC…), requiring best-in-class, high-performance IP developed on bleeding edge technology nodes. That’s wh... » read more

A Chiplet-Based Fully Homomorphic Encryption Accelerator


A technical paper titled “CiFHER: A Chiplet-Based FHE Accelerator with a Resizable Structure” was published by researchers at Seoul National University. Abstract: "Fully homomorphic encryption (FHE) is in the spotlight as a definitive solution for privacy, but the high computational overhead of FHE poses a challenge to its practical adoption. Although prior studies have attempted to desig... » read more

Who Will Regulate Data Exchanges In Chiplets?


Scaling is still important when it comes to logic and low power, but it's no longer the main avenue for improving performance. What used to be a single chip, comprised of various IP blocks and components on a single SoC, is giving way to a heterogeneous collection of chiplets — at least for the big chipmakers and system companies at the leading edge. Chiplets are currently the best solutio... » read more

Enabling A Chiplet Supply Chain


Chiplets have been in the news quite a bit lately. A chiplet-based architecture offers several advantages that chip designers can benefit from as they bring out new products to the market. Over the years, system designers have integrated more and more functions into a system on chip (SoC). As a result, the size of SoCs keeps increasing. Even though SoCs provide several advantages in performance... » read more

Week In Review: Manufacturing, Test


TSMC, Bosch, Infineon, and NXP will jointly invest in the European Semiconductor Manufacturing Co. (ESMC), in Dresden, Germany, to provide advanced semiconductor manufacturing services. ESMC marks a significant step toward construction of a 300mm fab, which is expected to have a monthly production capacity of 40,000 300mm (12-inch) wafers on TSMC’s 28/22nm planar CMOS and 16/12nm finFET proce... » read more

A Performance-Aware Framework For Co-Optimizing Floorplan And Performance Of Chiplet-Based Architecture


A technical paper titled “Floorplet: Performance-aware Floorplan Framework for Chiplet Integration” was published by researchers at Chinese University of Hong Kong and University of California Berkeley. Abstract: "A chiplet is an integrated circuit that encompasses a well-defined subset of an overall system's functionality. In contrast to traditional monolithic system-on-chips (SoCs),... » read more

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