tag: FD-SOI

Trading Off Power And Performance Earlier In Designs
By Ann Mutschler - 12 Sep, 2019 - Comments: 0

Optimizing performance, power and reliability in consumer electronics is an engineering feat that involves a series of tradeoffs based on gathering as much data about the use cases in which a design will operate. Approaches vary widely by market, by domain expertise, and by the established methodologies and perspective of the design teams. As a result, one team may opt for a leading-edge des... » read more

Taking Energy Into Account
By Ann Mutschler - 28 Aug, 2019 - Comments: 1

Considering power throughout the SoC design flow is common practice. The same cannot be said for energy, although that is beginning to change as chips increasingly incorporate heterogeneous processing elements. Combined with this, AI/ML/DL technologies increasingly allow engineering teams to explore and optimize design data for more targeted and efficient systems. But this approach also requ... » read more

What’s Next In Advanced Packaging
By Mark LaPedus - 20 Jun, 2019 - Comments: 3

Packaging houses are readying the next wave of advanced IC packages, hoping to gain a bigger foothold in the race to develop next-generation chip designs. At a recent event, ASE, Leti/STMicroelectronics, TSMC and others described some of their new and advanced IC packaging technologies, which involve various product categories, such as 2.5D, 3D and fan-out. Some new packaging technologies ar... » read more

Target: 50% Reduction In Memory Power
By Brian Bailey - 11 Apr, 2019 - Comments: 3

Memory consumes about 50% or more of the area and about 50% of the power of an SoC, and those percentages are likely to increase. The problem is that static random access memory (SRAM) has not scaled in accordance with Moore's Law, and that will not change. In addition, with many devices not chasing the latest node and with power becoming an increasing concern, the industry must find ways to... » read more

A Different Kind Of Material World
By Ed Sperling - 21 Mar, 2019 - Comments: 1

The semiconductor manufacturing world is poised for big change, and the driver will be materials. Materials always have been a critical factor in semiconductors. Silicon is so important that an entire region of California is named after it. Rare earths have raised fears about nationalistic monopolies. And the shift from aluminum to copper interconnects at 130nm caused one of the most painful... » read more

China’s Foundry Biz Takes Big Leap Forward
By Mark LaPedus - 28 Jan, 2019 - Comments: 1

China continues to advance its foundry industry with huge investments in new fabs and technology, despite trade tensions and a slowdown in the IC market. China has the most fab projects in the world, with 30 new facilities or lines in construction or on the drawing board, according to data from SEMI’s World Fab Forecast Report. Of those, 13 fabs are targeted for the foundry market, accordi... » read more

Embedded Phase-Change Memory Emerges
By Mark LaPedus - 24 Jan, 2019 - Comments: 3

The next-generation memory market for embedded applications is becoming more crowded as another technology emerges in the arena—embedded phase-change memory. Phase-change memory is not new and has been in the works for decades. But the technology has taken longer to commercialize amid a number of technical and cost challenges. Phase-change memory, a nonvolatile memory type that stores data... » read more

Process Variation And Aging
By Ann Mutschler - 17 Jan, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss design reliability and circuit aging with João Geada, chief technologist for the semiconductor business unit at ANSYS; Hany Elhak, product management director, simulation and characterization in the custom IC and PCB group at Cadence; Christoph Sohrmann, advanced physical verification at Fraunhofer EAS; and Naseer Khan, vice president of sales at M... » read more

FD-SOI At The Edge
By Ed Sperling - 03 Jan, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss changes in the FD-SOI world and what's behind them, with James Lamb, deputy CTO for advanced semiconductor manufacturing and corporate technical fellow at Brewer Science; Giorgio Cesana, director of technical marketing at STMicroelectronics; Olivier Vatel, senior vice president and CTO at Screen Semiconductor Solutions; and Carlos Mazure, CTO at Soi... » read more

Manufacturing Bits: Jan. 2
By Mark LaPedus - 02 Jan, 2019 - Comments: 0

Better nanowire MOSFETs At the recent IEEE International Electron Devices Meeting (IEDM), Imec and Applied Materials presented a paper on a new and improved way to fabricate vertically stacked gate-all-around MOSFETs. More specifically, Imec and Applied reported on process improvements for a silicon nanowire MOSFET, which is integrated in a CMOS dual work function metal replacement metal ga... » read more

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