Embedded Phase-Change Memory Emerges

What could make this memory type stand out from the next-gen memory crowd.

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The next-generation memory market for embedded applications is becoming more crowded as another technology emerges in the arena—embedded phase-change memory.

Phase-change memory is not new and has been in the works for decades. But the technology has taken longer to commercialize amid a number of technical and cost challenges. Phase-change memory, a nonvolatile memory type that stores data by changing the state of a material, is attractive because it’s supposedly faster than today’s flash memory with better endurance.

Like many new memory types, phase-change memory comes in two forms—standalone and embedded. On the standalone front, Intel for some time has been shipping a device called 3D XPoint, a next-generation memory based on phase-change. Intel sells 3D XPoint devices for solid-state storage drives (SSDs) and other products. In addition, Micron is developing the technology.

Now, STMicroelectronics is sampling products based on embedded phase-change memory. It is developing an automotive microcontroller (MCU) with embedded phase-change, based on a 28nm FD-SOI technology. So far, STMicroelectronics is the only company to announce embedded phase-change, although SMIC and TSMC are exploring it in R&D.

The embedded market is different than the standalone device segment. In embedded, an MCU integrates flash memory for code storage, which boots up a device and runs various programs. Typically, the industry uses NOR flash for the embedded memory, but NOR is running out of steam and may stop scaling at 28nm or 22nm.

That’s where embedded phase-change fits, along with other next-generation memory types —they are expected to replace NOR when it stops scaling. Besides phase-change, the other contenders for embedded apps include carbon nanotube RAM, FeFET, FRAM, MRAM and ReRAM.

But moving to a next-generation embedded memory type is challenging. Some technologies are just barely ready, while others are still in R&D. And it’s unclear which new memory type will prevail over the long term.

“It’s too early to tell,” said Jim Handy, an analyst with Objective Analysis. “MRAM is making the most noise, but that doesn’t necessarily mean it has won the battle. It’s probably too soon to say that.”

Over time, OEMs likely will adopt several new memory types because no one technology can address all applications. But before OEMs adopt anything, the product must meet certain price and performance specs.

Next-gen memory mania
Today, microcontrollers (MCUs) are used in a plethora of systems, such as aircraft, appliances, cars and medical equipment. MCUs perform the processing functions in the chip and incorporate various components on the same device, such as SRAM, embedded memory and peripherals.

SRAM stores data and frequently used instructions. Embedded memory is based on EEPROM or NOR flash. “With EEPROM, each bit is two transistors, and each byte can be erased or re-programmed,” Handy said. “On each block with NOR flash, we have one huge transistor that does the erase for all of the bits on the block. A huge transistor still saves a lot of chip space, compared to two transistors per bit.”

For the embedded market, the next-generation memories are targeted for two applications. “All of the embedded technologies are vying for the same prize—to replace embedded EEPROM and NOR flash, and perhaps, eventually, embedded SRAM,” Handy said.

SRAM is fast, but it takes up too much space. So the industry is developing a new memory to replace all or part of the SRAM. MRAM is the leading contender, but this technology still must be proven in the field.

Embedded MRAM is targeted for SRAM-based cache functions in processors and MCUs.

“There are different levels of cache,” said Gill Lee, managing director of memory technology at Applied Materials. “Level 1 cache is SRAM. Level 2 cache is SRAM. Right now, Level 3 cache is also SRAM, which is the largest area in the application processor or microprocessor. One of the goals for embedded memory is to replace that Level 3 cache. If STT-MRAM can replace this Level 3 cache SRAM, it can save the area. In terms of cell size, SRAM is huge, but MRAM can be much smaller.”

Embedded NOR flash, sometimes called eFlash, is a different application with other issues. MCUs with embedded NOR based on 40nm processes and above are in production today. Then, MCUs at 28nm are ramping up with 22nm and smaller geometries in the works.

The problem is that it’s difficult to scale NOR at 28nm/22nm and beyond. The technology requires more masks at each node, thereby increasing the costs. “Many believe that 28nm/22nm will be the end of eFlash, not because of scalability limitations but because of economic barriers,” said David Hideo Uriu, product marketing director at UMC. “Can you scale embedded flash beyond 28nm? The short answer is yes, as we will support it in our 22nm node. But the macro design is essentially the same as our 28nm.”

Regardless, the industry needs a new embedded solution at 28nm/22nm and beyond, and the next-generation memories promise to fill the void. The new memory types also are targeted for the standalone device market.

The next-generation memories have been in R&D for years, and in the past the consensus is they would replace today’s memory types, such as DRAM, flash and SRAM, which have various limitations.

For example, DRAM is cheap, but it is also a power-hungry device that is volatile. It loses the data when the power is turned off in a system. Then, flash memory stores the data even when the power is off. In operation, though, flash undergoes several read/write cycles when programming, which is a slow process.

The new memories are attractive because they combine the speed of SRAM and the non-volatility of flash with unlimited endurance. They also provide single-bit alterability when programming.

But the new memories have taken longer to develop than expected. Most make use of exotic materials and switching schemes to store information, and they present some manufacturing challenges in the fab. Plus, the existing memories have scaled much further than previously thought and are cheap. These and other factors have prevented the new memory types from gaining widespread adoption.

Nevertheless, MRAM and phase-change for standalone applications are shipping and have made some inroads. They haven’t replaced conventional memories, though. Instead, they work with existing memory to help speed up various tasks in systems.

In the embedded market, FRAM and ReRAM have been shipping for some time, with MRAM and other technologies in the works.

Multiple memory types are needed as one product can’t do everything. “There are many options,” said Aki Sekiguchi, deputy general manager of the Corporate Innovation Division at TEL. “Multiple solutions can work for different applications and devices.”

The decision to use one technology or another depends on several factors. “What are my requirements? How long does it last? The rest is whether it meets all of the reliability requirements and performance requirements. Then, the automotive industry has its own set of requirements, which tend to be more stringent,” Sekiguchi said.

The big test will come this year, when makers of MRAM and ReRAM will attempt to displace NOR on the embedded front. “For the embedded nonvolatile memory market, embedded MRAM and ReRAM will start to see industry volumes in 2019,” said UMC’s Uriu. “It appears that MRAM is maybe slightly ahead of ReRAM due to their development lengths. Since it’s just starting for both the consumer and automotive grades, we are not seeing significant volumes yet. But if we look ahead to 2020 and beyond, the industry can expect high growth.”

MRAM vs. ReRAM vs. PCM
Today, the momentum is building for embedded MRAM, as several foundry vendors are developing the technology for customers. GlobalFoundries, Samsung, TSMC and UMC are developing a next-generation MRAM technology called spin-transfer torque MRAM (STT-MRAM). STT-MRAM uses the magnetism of electron spin to provide non-volatile properties in chips.

In traditional memory, the data is stored as an electric charge. In contrast, MRAM uses a magnetic tunnel junction (MTJ) memory cell for the storage element.

STT-MRAM chips are trickling out into the market for use in SSDs. For this application, the temperature requirements are less rigid.

Automotive, a big market for MCUs with embedded memory, has different requirements. “Any emerging nonvolatile memory that will be used in MCUs for automotive have to pass a tough reliability spec. It must meet solder reflow requirements, high reliability and a shelf-life greater than 20 years. Automotive applications require 125°, and Grade 0 requires 150°,” Uriu said.

The requirements are even more demanding for advanced driver-assistance systems (ADAS) and autonomous driving technology. ADAS involves various safety features in a car, such as automatic emergency braking and lane detection.

“As always connected and autonomous vehicles are getting closer to reality, demands for high-density and energy-efficient embedded nonvolatile memory solutions are expected to grow in automotive applications,” said Kangho Lee, an MRAM technologist at GlobalFoundries, in a recent paper. “To enable an emerging embedded nonvolatile memory technology for automotive applications, it is crucial to verify that embedded nonvolatile memory is capable of meeting a sub-ppm bit error rate (BER) and endurance/data retention requirements across the automotive-grade operating temperature range.”

In a major milestone, GlobalFoundries recently demonstrated a 22nm FD-SOI technology, which incorporates a 40-Mbit embedded MRAM for automotive-grade-1 (Auto-G1) MCU applications. The technology has demonstrated a sub-ppm BER and a zero failure after 1 million endurance cycles across Auto-G1 operating temperature ranges (-40°C to ~150 °C).

Meanwhile, SMIC, TSMC and UMC are developing embedded ReRAM, which is targeted for consumer applications. In ReRAM, a switching medium is situated between a top and a bottom electrode. When a positive voltage is applied on the top electrode, a conductive filament forms between the two electrodes. The filament consists of ion atoms. When a negative voltage is applied on the bottom electrode, the conductive filament breaks.


Fig. 1: MRAM vs. ReRAM. Source: UMC

The latest contender is phase-change memory, sometimes called PCM. “Phase-change memory technology is based upon a material that can be either amorphous or crystalline at normal ambient temperatures. The crystalline state has a low resistance and the amorphous state has a high resistance,” Objective Analysis’ Handy said. “Phase-change memory’s name stems from the fact that the bit cell switches between crystalline and amorphous phases. This is controlled by melting the bit cell by passing a current though it and then allowing it to cool at different rates.”

There are different types of PCM memory cells in the market. In one version, a phase-change memory cell consists of four pieces—a bottom electrode, top electrode, heater and GST materials. The GST material is placed under the top electrode. The bottom electrode is separate. The heater, which resembles a via, connects the bottom electrode to the GST/top electrode structure. In operation, the heater changes the cell between the crystalline and amorphous states.

Intel’s 3D XPoint is the most notable example of a phase-change memory. The structure is referred to as a cross-point architecture. Based on 20nm geometries, 3D XPoint is built around a two-layer stacked architecture with 128-gigabit densities.

3D XPoint is a storage-class memory that fits somewhere between DRAM and NAND. It is faster than NAND with greater endurance.

Figure 2: 3D XPoint architecture Source: Wikipedia

For its part, STMicroelectronics is developing an MCU with an embedded 16MB (mega-byte) phase-change memory cell. The MCU is fabricated in a 28nm FD-SOI technology with body-biasing capabilities. A 5-volt transistor has been demonstrated. The distributions of the macro-cell achieved a BER of <10-8 after multiple bakes at 150°C and 10k cycling of code storage memory.

The MCU is aimed for the stringent requirements in automotive. “Automotive applications usually require a high level of reliability at hot temperatures,” said Franck Arnaud, a technology development director at STMicroelectronics. “Among all the resistive memories proposed as innovative solutions able to replace floating gate cells, phase-change memory is the only one demonstrated to be compliant simultaneously with automotive requirements (several years of data retention at 150°C) and able to guarantee code integrity after soldering a reflow thermal profile (260°C peak temperature) on a multi-megabit array.”

Still, embedded PCM must be proven in the field. There are also some technical and cost challenges to make all phase-change memory flavors in the fab.

Phase-change memory is based on an exotic alloy, a germanium antimony tellurium (GST) compound, which is a chalcogenide.

“Phase-change memory uses chalcogenide glasses, which need to be isolated from silicon to avoid contamination,” Objective Analysis’ Handy said. “Good quarantine techniques were developed when copper started to be used for interconnects in the 1990s, so this is not a show stopper. Phase-change memory is also more temperature sensitive than ReRAM or MRAM, but this has been addressed adequately for most solder reflow requirements.”

Generally, each phase-change type requires different process steps in the fab. For example, to make a cross-point device in the fab, the first step is to produce a stack of materials using an alternating deposition process. In simple terms, the deposition tool deposits the bottom electrode material on a substrate, followed by the GST materials, and then a top electrode material.

Then, individual pillars are patterned on the stack using traditional lithography tools. The patterns are etched, forming individual pillar-like structures that become the PCM cells. Then, word and bit lines are formed.

The process is complicated with various challenges. In the alternating deposition step, the idea is to enable a uniform stack with clean interfaces and no defects. But the really big challenge is the etch process. Reactive-ion etch (RIE) is one way to etch the stack, effectively carving out a structure by bombarding a surface with a chemical process.

In RIE, though, the GST materials may be sensitive to the plasma energy, thereby causing thermal damage. So the industry is moving towards ion-beam etch (IBE) tools. In IBE, the etch mechanism is conducted by bombarding the structure with ions.

“What we see is the increasing dependency on equipment innovations in enabling scaling and new technologies, particularly in the areas of new materials and etching capabilities. We have seen this in 3D NAND, and in emerging memories such as PCM and MRAM,” said Yang Pan, corporate vice president of advanced technology development at Lam Research. “All these new memory technologies depend on new materials and etch processes. Equipment innovations, such as IBE, are fundamental to the success of new memory technologies.”

There are other challenges. Typically, DRAM, NAND and flash are fabricated in a memory fab. In embedded, a next-generation memory technology like MRAM and phase-change are built in a logic fab.

In a logic fab, the transistor portion of the device is made in the so-called front-end-of-the-line (FEOL). Then, the device is shipped to a separate fab facility called the backend-of-the-line (BEOL). The BEOL is where the metal layers and tiny copper interconnects are fabricated in chips.

Typically, embedded MRAM, phase-change and others are built in the BEOL in a logic fab. Generally, an embedded memory is built on top of a contact or via at one of the metal layers of a chip.

In one example, TSMC recently presented a paper on an embedded phase-change memory technology in a 40nm process. In the lab, TSMC fabricated a PCM cell, which is situated between the metal 4 and metal 5 layers in the copper interconnect stack.

In this flow, a doped GST material is deposited on the bottom electrode, followed by the deposition of the top electrode. The top electrode and GST materials are patterned and then the structure is connected to the M5 layer, according to TSMC.

“For embedded memory applications, compatibility with the underlying logic process is of the upmost importance,” said J.Y. Wu, a researcher at TSMC, in the paper. “Minimizing operating current entails PCM material optimization along with the memory cell structure electro-thermal design.”

It’s unclear if TSMC plans to offer an embedded phase-change for foundry customers. It depends on demand, cost and other factors.

That goes for MRAM and ReRAM, as well the other technologies in R&D, such as carbon nanotube RAMs and ferroelectric FETs (FeFETs).

So which technology will become the ultimate winners? It’s unclear right now. The dust has yet to settle in the competitive and crowded landscape.

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1 comments

Guest says:

Does the foundry or the foundry customer determine the memory material’s requirements?

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