Accurate Error Bit Mode Analysis Of STT-MRAM Chip With A Novel Current Measurement Module


Authors: (Advantest) Ryo Tamura, Ibuki Mori Naoyoshi Watanabe; (Tohoku University) Hiroki Koike, Tetsuo Endoh. A novel memory test system is needed for future STT-MRAM mass production that supports error bit analysis and its mode categorization on STT-MRAM chip measurement, as STTMRAM cell’s switching is a probabilistic phenomenon based on quantum mechanics. In order to meet this requireme... » read more

Challenges In Making And Testing STT-MRAM


Several chipmakers are ramping up a next-generation memory type called STT-MRAM, but there are still an assortment of manufacturing and test challenges for current and future devices. STT-MRAM, or spin-transfer torque MRAM, is attractive and gaining steam because it combines the attributes of several conventional memory types in a single device. In the works for years, STT-MRAM features the ... » read more

Embedded Phase-Change Memory Emerges


The next-generation memory market for embedded applications is becoming more crowded as another technology emerges in the arena—embedded phase-change memory. Phase-change memory is not new and has been in the works for decades. But the technology has taken longer to commercialize amid a number of technical and cost challenges. Phase-change memory, a nonvolatile memory type that stores data... » read more

Power/Performance Bits: Jan. 22


Efficient neural net training Researchers from the University of California San Diego and Adesto Technologies teamed up to improve neural network training efficiency with new hardware and algorithms that allow computation to be performed in memory. The team used an energy-efficient spiking neural network for implementing unsupervised learning in hardware. Spiking neural networks more closel... » read more

Foundries See Growth, New Issues In 2019


The silicon foundry business is poised for growth in 2019, although the industry faces several challenges across a number of market segments next year. Generally, foundry vendors saw steady growth in 2018, but many are ending the year on a sour note. Weak demand for Apple’s new iPhone XR and a downturn in the cryptocurrency market have impacted several IC suppliers and foundries, causing t... » read more

Hybrid Memory


Gary Bronner, senior vice president of Rambus Labs, talks about the future of DRAM scaling, why one type of memory won’t solve all needs, and what the pros and cons are of different memories. https://youtu.be/R0hhDx2Fb7Q » read more

Embedded Flash Scaling Limits


Embedded nonvolatile flash memory has played a key role in chips for years, but the technology is beginning to face some scaling and cost roadblocks and it’s not clear what comes next. Embedded flash is used in several markets, such as automotive, consumer and industrial. But the automotive sector appears to be the most concerned about the future of the technology. Typically, a car incorpo... » read more

CMOS-Embedded STT-MRAM Arrays In 2xnm Nodes For GP-MCU Applications


Perpendicular Spin-Transfer Torque (STT) MRAM is a promising technology in terms of read/write speed, low power consumption and non-volatility, but there has not been a demonstration of high density manufacturability at small geometries. In this paper we present an unprecedented demonstration of a robust STT-MRAM technology designed in a 2x nm CMOS- embedded 40 Mb array. Key features are full a... » read more

Quantum Effects At 7/5nm And Beyond


Quantum effects are becoming more pronounced at the most advanced nodes, causing unusual and sometimes unexpected changes in how electronic devices and signals behave. Quantum effects typically occur well behind the curtain for most of the chip industry, baked into a set of design rules developed from foundry data that most companies never see. This explains why foundries and manufacturing e... » read more

CMOS-Embedded STT-MRAM Arrays In 2xnm Nodes For GP-MCU Applications


Perpendicular Spin-Transfer Torque (STT) MRAM is a promising technology in terms of read/write speed, low power consumption and non-volatility, but there has not been a demonstration of high density manufacturability at small geometries. In this paper we present an unprecedented demonstration of a robust STT-MRAM technology designed in a 2x nm CMOS- embedded 40 Mb array. Key features are full a... » read more

← Older posts