The Week In Review: System-Level Design


India's reliance on technology has created a huge demand for software in the country. IDC expects the market for enterprise software in India to grow 19%, and the market for collaborative applications to grow 13.5%. Growth is continuing across all business markets, turning India into a huge consumer of software rather than just a creator. The enterprise software market in India is dominated by ... » read more

Defining The Next Standard Cell


Synopsys, Intel and IBM all contributed technology to Si2 to create a standard version of parameterized cells, or PCells, for mixed-signal designs. The move is an attempt to smooth out design incompatibilities using Synopsys and Cadence technology. Cadence is the clear market leader in this space. But as more technology is developed using different vendors'  tools for integration in complex... » read more

What’s After Silicon?


As discussed in the first article in this series, germanium is one of the leading candidates to succeed silicon as the channel material for advanced transistors, and has been for several years. The fundamental challenges of germanium integration were detailed at length in 2007. Unfortunately, knowing what the issues are does not necessarily lead to a solution. When a MOSFET transistor turns ... » read more

Manufacturing Bits: Jan. 7


Climbing Terminator Robots Simon Fraser University has developed a family of climbing robots that mimic the stickiness of gecko lizard feet. Based on a “footpad terminator” adhesive technology, the robots could be used in space missions and on Earth. The climbing robot, called Abigaille, features six legs. This allows the robots to crawl on vertical and horizontal structures. The techno... » read more

The Week In Review: System-Level Design


The big buzz at this year’s CES is around wearable computing, according to Gartner, and the big drivers will be fitness and digital health. The firm believes wearable electronics will be peripherals to smartphones, which will provide connectivity to store and analyze biodata. Hewlett-Packard plans to cut 34,000 employees by the end of this year, or roughly 11% of its workforce, according t... » read more

The Week In Review: Manufacturing & Design


Tensions between the U.S. and China are growing. In a research report, Gus Richard, an analyst at Piper Jaffray, said: “The technology sector is being impacted by U.S./Chinese tensions over cybersecurity. The combination of Huawei being blocked from doing business in the United States and the Snowden affair are impacting U.S. tech companies' prospects in China. China’s state-run media ident... » read more

Fastest Computers On The Planet


The latest Green500 list (Excel spreadsheet here) was just released at the end of last month and heterogeneous systems now own the top of the list. The Top 10 systems all use a combination of Intel Xeon (mostly E5) processors paired with NVIDIA K20s. There are now 6 systems listed that have broken the 3,000 MFLOPS/W barrier and TSUBAME-KFC, belonging to the Tokyo Institute of Technology’s GSI... » read more

Do Students Need More Formal Education?


A few weeks ago, some of the top researchers and practitioners in the area of formal methods converged on Portland, Oregon. The event was the annual Formal Methods in Computer-Aided Design (FMCAD) conference and Semiconductor Engineering attended the panel titled “Teaching Formal Methods: Needs, Challenges, Experiences, and Opportunities.” Panelists included: Jason Baumgartner, formal verif... » read more

Tunnel FETs Emerge In Scaling Race


Traditional CMOS scaling will continue for the foreseeable future, possibly to the 5nm node and perhaps beyond, according to many chipmakers. In fact, chipmakers already are plotting out a path toward the 5nm node, but needless to say, the industry faces a multitude of challenges along the road. Presently, the leading transistor candidates for 5nm are the usual suspects—III-V finFETs; gate... » read more

What’s After 10nm?


For some time, chipmakers have roughly doubled the transistor count at each node, while simultaneously cutting the cost by around 29%. IC scaling, in turn, enables faster and lower cost chips, which ultimately translates into cheaper electronic products with more functions. Consumers have grown accustomed to the benefits of Moore’s Law, but the question is for how much longer? Chips based ... » read more

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