Week In Review: IoT, Security, Automotive

By Susan Rambo - 22 Nov, 2019 - Comments: 0

Automotive Porsche’s electric race car, the 99X Electric, used ANSYS Technology’s system-level simulation solutions to create an advanced electric powertrain. The powertrain is also being adapted for use in Porsche’s consumer electric cars. "ANSYS system-level simulations are instrumental for optimizing the Porsche E-Performance Powertrain's motor, gearbox, power electronics and control ... » read more

Is There A Crossover Point For Mainstream Anymore?

By Ed Sperling - 21 Nov, 2019 - Comments: 0

Until 28nm, it was generally assumed that process nodes would go mainstream one or two generations after they were introduced. So by the time the leading edge chips for smartphones and servers were being developed at 16/14nm and 10/7nm, it was assumed that developing a chip at 28nm would be less expensive, less complex, and that the process rule deck would shrink. That worked for decades. Th... » read more

RISC-V Markets, Security And Growth Prospects

By Ed Sperling - 18 Nov, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss open instruction set hardware with Ben Levine, senior director of product management in Rambus' Security Division; Jerry Ardizzone, vice president of worldwide sales at Codasip; Megan Wachs, vice president of engineering at SiFive; and Rishiyur Nikhil, CTO of Bluespec. What follows are excerpts of that conversation. Part one of this discussion is ... » read more

Power Complexity On The Rise

By Ann Mutschler - 14 Nov, 2019 - Comments: 0

New chip architectures and custom applications are adding significant challenges to chip design and verification, and the problems are becoming much more complex as low power is added into the mix. Power always has been a consideration in design, but in the past it typically involved different power domains that were either on, off, or in some level of sleep mode. As hardware architectures s... » read more

Addressing Pain Points In Chip Design

By Ed Sperling - 13 Nov, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss the impact of multi-physics and new market applications on chip design with John Lee, general manager and vice president of ANSYS' Semiconductor Business Unit; Simon Burke, distinguished engineer at Xilinx, Duane Boning, professor of electrical engineering and computer science at MIT; and Thomas Harms, director EDA/IP Alliance at Infineon. What foll... » read more

Verdi Transaction Debug Solution: Unified Performance Analysis And Debug For Interconnect

By Synopsys - 13 Nov, 2019 - Comments: 0

In modern systems on chip (SoCs), where Arm AMBA protocols are intensively used as standard intellectual property (IP) interfaces, the interconnect is usually required to bridge and facilitate the communication between many different IP interfaces. The interconnect presents one of the biggest challenges of SoC verification, considering the different kinds of protocol interfaces, conversion of d... » read more

A Breakthrough In Silicon Bring-Up

By Matthew Knowles - 12 Nov, 2019 - Comments: 1

The current semiconductor market is seeing increasingly complex silicon devices for applications like 5G wireless communications, autonomous driving, and artificial intelligence. One of the ways designers are working to control design time and cost is through the adoption of IJTAG (IEEE 1687) for a plug-and-play style IP integration during design. The benefits of using IJTAG are still emerging,... » read more

Leveraging Data In Chipmaking

By Ed Sperling - 12 Nov, 2019 - Comments: 0

John Kibarian, president and CEO of PDF Solutions, sat down with Semiconductor Engineering to talk about the impact of data analytics on everything from yield and reliability to the inner structure of organizations, how the cloud and edge will work together, and where the big threats are in the future. SE: When did you recognize that data would be so critical to hardware design and manufact... » read more

Traceability Of Functional Safety Requirements In Automotive IP And SoCs

By Shivakumar Chonnad - 07 Nov, 2019 - Comments: 0

By Shivakumar Chonnad, Vladimir Litovtchenko, and Rohit Bhardwaj Developing functional safety systems, including all the components such as the system-on-chip (SoC) and IP, hinges on the ability to meet the stringent automotive functional safety requirements such as definition, implementation, verification, and validation. Depending on the Automotive Safety Integrity Level (ASIL), the functi... » read more

Service Revenue Growing With Chip Complexity

By Ann Mutschler - 04 Nov, 2019 - Comments: 0

Rising complexity, new markets, and a shortage of in-house expertise are beginning to rekindle demand for services for the first time in nearly a decade. The semiconductor industry has been racing to design chips for a variety of new and existing applications, but they are facing challenges on a number of fronts: Leading-edge chips require new architectures due to a sharp reduction in s... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

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