tag: interconnect

Keeping Up Power And Performance With Cobalt
By Mehul Naik - 24 Jan, 2019 - Comments: 0

Chip designers require simultaneous improvements in “PPAC”: power, performance and area/cost (Fig. 1). Achieving these improvements is becoming increasingly difficult as classic Moore's Law scaling slows. What's needed is a new playbook for the industry consisting of new materials, new architectures, new 3D structures within the chip, new methods to shrink feature geometries, and advanced p... » read more

Data Transfer Without Energy Loss
By Serena Brischetto - 24 Jan, 2019 - Comments: 0

SEMI met with Erez Halahmi, vice president at 0eC SA, to discuss a new way to transfer information not only between chips but also between servers to reduce power consumption while boosting performance. The two spoke ahead of his presentation at the 3D & Systems Summit, 28-30 January, 2019, in Dresden, Germany. To register for the event, please click here. SEMI: What is Zero energy co... » read more

Not Enough Respect For SoC Interconnect
By K. Charles Janac - 30 Jul, 2018 - Comments: 0

For high-volume system-on-chip (SoC) applications—artificial intelligence (AI), automotive, mobility, solid state drives and more—effective interconnect technology can generate hundreds of millions of dollars in revenue due to smaller chip area, better functionality and faster delivery of SoC platforms. State-of-the-art interconnect technology also allows chip designers to create SoC deriva... » read more

Neural Nets In ADAS And Autonomous Driving SoC Designs
By Kurt Shuler - 26 Apr, 2018 - Comments: 0

Automotive electronics has ushered in a new wave of semiconductor design innovation and one new technology gaining a lot of attention is neural networks (NNs). Advanced driving assistance systems (ADAS) and autonomous car designs now rely on NNs to meet the real-time requirements of complex object-recognition algorithms. The concept of NNs has been around since World War II, promising a futu... » read more

How SoC Interconnect Enables Flexible Architecture For ADAS And Autonomous Car Designs
By Kurt Shuler - 22 Feb, 2018 - Comments: 0

When the mobile phone era saw its fastest growth, the design teams that were the most innovative were able to introduce game-changing features before anyone else. Those companies also had the most configurable interconnect IP, allowing them to adapt to quickly changing market needs faster than their competition. Now, nearly a decade later, when autonomous driving is quickly moving into the m... » read more

New Interconnect Makes eFPGA Dense And Portable
By Geoff Tate - 02 Nov, 2017 - Comments: 0

FPGAs were invented over 30 years ago. Today they are much bigger and faster, but their basic architecture remains unchanged: logic blocks formed around LUTs (look-up-tables) in a sea of mesh (x/y grid) interconnect with a matrix of switches at every “intersection.” One FPGA company executive once said they don’t really sell programmable logic, they sell programmable interconnect, beca... » read more

The Week In Review: Design
By Jesse Allen - 06 Oct, 2017 - Comments: 0

M&A Altair acquired Runtime Design Automation. Founded in 1995, Runtime provides tools for optimizing usage of EDA tools, including flow management, job scheduling, and license utilization, as well as tools for optimizing HPC network resources. Altair's focus is on engineering simulation, with tools for HPC resource management and IoT data analytics. Terms of the deal were not disclosed. ... » read more

Boldly Go Where No NoC Has Gone Before
By Rajesh Ramanujam - 25 May, 2017 - Comments: 0

Functional safety, at varying degrees of integrity and with or without the ISO 26262, has become a cornerstone of SoCs in many key market segments, not just automotive. And the industry goal is to achieve these reliability levels without sacrificing any PPA and while continually reducing TTM. Go figure! I know, that’s like saying, make me an omelet without breaking eggs. And egg substitute is... » read more

Making Interconnects Faster
By Mehul Naik - 22 May, 2017 - Comments: 3

In integrated circuits, interconnect resistance is a combination of wire and via resistance. Wire resistance of a conductor depends on several factors, one of which is the electron scattering at various surfaces and grain boundaries. Via resistance, on the other hand, is a function of the thickness or resistivity of the layers at the bottom of the via through which current must travel. T... » read more

System Performance Analysis At ARM
By Arm - 07 Dec, 2016 - Comments: 0

Performance analysis is a vital task in modern SoC design. An under-designed SoC may run too slowly to keep up with the demands of the system. An over-designed SoC will consume too much power and require more expensive IP blocks. At ARM we want to help our partners build SoCs that deliver the best performance within their power and area budgets. The simple truth is that this is more difficul... » read more

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