3D-Printed Logic Gates and Resettable Fuses, Via Material Extrusion (MIT)


A new technical paper titled "Semiconductor-free, monolithically 3D-printed logic gates and resettable fuses" was published by researchers at MIT. "This work reports the first active electronics fully 3D-printed via material extrusion, i.e. one of the most accessible and versatile additive manufacturing processes. The technology is proof-of-concept demonstrated through the implementation of ... » read more

Research Bits: Oct. 14


Si-photonics chip emits beam of light MIT researchers developed a miniature, chip-based “tractor beam” that could help scientists study DNA, classify cells, and investigate the mechanisms of disease. The device uses a beam of light emitted by a silicon-photonics chip to manipulate particles millimeters away from the chip surface, while the sample remains sterile under its glass cover. T... » read more

Chip Industry Week In Review


Amkor will provide turnkey advanced packaging and test services to TSMC in Amkor's planned facility in Peoria, Arizona, in a deal announced on Thursday. The companies jointly specified the packaging technologies, such as TSMC’s Integrated Fan-Out (InFO) and Chip on Wafer on Substrate (CoWoS). President Biden signed into law a bill that exempts some semiconductor projects funded by the U.S.... » read more

Research Bits: Oct. 1


Rust-resistant coating for 2D semiconductors Researchers from Pennsylvania State University, National Yang Ming Chiao Tung University in Taiwan, Purdue University, Intel, and the Kurt J. Lesker Company developed a synthesis process to produce a rust-resistant coating with properties ideal for creating faster, more durable electronics. "One of the biggest issues that we see in 2D semiconduct... » read more

Chip Industry Technical Paper Roundup: Sept. 24


New technical papers recently added to Semiconductor Engineering’s library: [table id=358 /] More ReadingTechnical Paper Library home » read more

Improving The Air-Stability and NBTI Reliability of BEOL CNFETs


A new technical paper titled "Overcoming Ambient Drift and Negative-Bias Temperature Instability in Foundry Carbon Nanotube Transistors" was published by researchers at MIT, Stanford University, Carnegie Mellon University and Analog Devices. Abstract: "Back-end-of-line (BEOL) logic integration is emerging as a complementary scaling path to supplement front-end-of-line (FEOL) Silicon. Among ... » read more

Research Bits: Sept. 3


3D printing of specialized antennas, sensors Researchers from the National University of Singapore developed a 3D printing technique that can be used to create three dimensional, self-healing electronic circuits. Called tension-driven CHARM3D, the technique enables the 3D printing of free-standing metallic structures without requiring support materials and external pressure. It uses Field�... » read more

Chip Industry Week in Review


The Biden-Harris Administration announced preliminary terms with HP for $50 million in direct funding under the CHIPs and Science Act to support the expansion and modernization of HP’s existing microfluidics and microelectromechanical systems (“MEMS”) facility in Corvallis, Oregon. CHIPS for America launched the CHIPS Metrology Community, a collaborative initiative designed to advance ... » read more

Chip Industry Technical Paper Roundup: August 13


New technical papers recently added to Semiconductor Engineering’s library: [table id=249 /] More ReadingTechnical Paper Library home   » read more

Research Bits: Aug. 5


Measuring temperature with neutrons Researchers from Osaka University, National Institutes for Quantum Science and Technology, Hokkaido University, Japan Atomic Energy Agency, and Tokamak Energy developed a way to rapidly measure the temperature of electronic components inside a device using neutrons. The technique, called ‘neutron resonance absorption’ (NRA), examines neutrons being ab... » read more

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