tag: Mentor Graphics

Dedicated ASIC Design Is Now Cost-Effective
By Mentor, a Siemens Business - 24 Jun, 2015 - Comments: 0

Current market and technology trends have increased the demand for mixed-signal ASICs. Smaller projects with modest design budgets are viable due to low cost design tools and easy access to flexible, mature IC processes. This is especially compelling for developing mixed-signal ASICs for cost-sensitive sensor applications for the Internet of things (IoT). This paper discusses how costs and risk... » read more

Blog Review: June 24
By Jesse Allen - 24 Jun, 2015 - Comments: 0

Rambus' Aharon Etengoff reports on a new development enabling a needle measuring just a few millimeters in length to inject mesh electronics directly into the brain, and the medical possibilities of injectable electronics. ARM's Eoin McCann presents seven topics getting a lot of air time both in the booths and in speeches, presentations and panel discussions at DAC. Synopsys' Michael Posn... » read more

Full Coverage Or Full Monty
By Brian Bailey - 22 Jun, 2015 - Comments: 0

Without adequate coverage metrics and tools, verification engineers would never be able to answer the proverbial question: are we done yet? But a lot has changed in the design flow since the existing set of metrics was defined. Does it still ensure that the right things get verified, that time is not wasted on things deemed unimportant or a duplication of effort, and can it handle today’s hie... » read more

Litho Challenges Break The Design-Process Wall
By Katherine Derbyshire - 22 Jun, 2015 - Comments: 3

The days when chip designers could throw tape “over the wall” to the manufacturing side are long gone. Over the last several technology generations, increasingly restrictive process kits have forced designers to accommodate their circuit structures to the manufacturing process. Lacking a successor to 193nm lithography, the industry has turned to increasingly complex resolution enhancemen... » read more

Is EUV Making Progress?
By Ann Mutschler - 18 Jun, 2015 - Comments: 4

By Ann Steffora Mutschler & Ed Sperling EUV has been promised for a couple of decades, counted on for at least three process nodes on the ITRS roadmap, and considered essential to chip manufacturing since 22nm. Billions of dollars have been invested in R&D, engineering teams from around the world have contributed to its development, and still serious problems persist. Just how close... » read more

Foundries Expand Planar Efforts
By Mark LaPedus - 18 Jun, 2015 - Comments: 0

Competition is heating up in the leading-edge foundry business, as vendors begin to ramp up their new 16nm/14nm finFET processes. But that’s not the only action in the foundry arena. They are also expanding their efforts in the leading-edge planar market by rolling out new 28nm and 22nm processes. On one front, TSMC is offering new 28nm variants, based on bulk CMOS technology. And on an... » read more

FinFET And Multi-Patterning Aware Place And Route Implementation
By Mentor, a Siemens Business - 18 Jun, 2015 - Comments: 0

The use of finFETs and multi-patterning has a huge impact on the entire physical implementation flow. This paper outlines the new challenges in placement, routing, optimization, and physical verification and describes how the Olympus-SoC place and route system handles them. To read more, click here. » read more

Case Studies In Double-Patterning Debug
By David Abercrombie - 18 Jun, 2015 - Comments: 0

Double patterning (DP) impacts just about every part of the design and manufacturing flows. However, the kinds of issues you encounter, the way they manifest themselves, and the ideal way to address them may be very different in different parts of these flows. I feel like I have spent a lot of time the last six months or so working with place and route (P&R) and chip finishing engineers on DP i... » read more

Power Verification Now Required
By Ann Mutschler - 17 Jun, 2015 - Comments: 0

Today’s verification tasks may seem daunting — and much of it is — but all of it is absolutely necessary to make sure chips operate properly with a larger system. Throw power into the mix and the challenges mount. The good news is that there is no shortage of tools and methodologies to help with these tasks. The bad news is that even the best tools won’t make the challenges disappear... » read more

Blog Review: June 17
By Jesse Allen - 17 Jun, 2015 - Comments: 0

Can big data help farmers produce bigger crops? From Iowa to Indonesia, Rambus' Aharon Etengoff looks at programs combining sensors, drones, and analytics where narrowing the odds of the next catastrophic crop failure is just the beginning. Forget any preconceptions you might have about the non-profit sector, says ARM's Dominic Vergine. UNICEF's global procurement hub looks and runs like an ... » read more

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