Beyond The RISC-V ISA


For chip architects and designers today, “the ISA” in RISC-V is a small consideration. The concern isn’t even choosing “the core.” Designers today are faced by a “whole system” problem—a problem of systemic complexity. That fact is implicit in the picture that I show people to explain the UltraSoC embedded analytics architecture. It shows a block-level representation of an So... » read more

Week in Review: IoT, Security, Auto


Internet of Things Amazon Web Services announced that Iridium Communications has joined the AWS Partner Network. AWS and Iridium have collaborated on development of Iridium CloudConnect, a service that enables worldwide coverage for Internet of Things applications through Iridium’s satellite network. AWS IoT is being paired with Iridium IoT services as a result. IHS Markit forecasts there wi... » read more

Adding NoCs To FPGA SoCs


FPGA SoCs straddle the line between flexibility and performance by combining elements of both FPGAs and ASICs. But as they find a home in more safety- and mission-critical markets, they also are facing some of the same issues as standard SoCs, including the ability to move larger and larger amounts of data quickly throughout an increasingly complex device, and the difficulty in verifying and de... » read more

Implementation Of An Asynchronous Bundled-Data Router For A GALS NoC In The Context Of A VSoC


Designs of asynchronous networks-on-chip are of growing interest because a complete asynchronous implemen- tation can solve the synchronization problems of large networks. However, asynchronous circuits suffer from the lack of proper design flows because their functionality often relies on timing constraints, which are not extensively supported by common CAD synthesis tools. This paper proposes... » read more

Tech Talk: Automotive Design


NetSpeed Systems CEO Sundari Mitra talks about how to speed up the design of automotive chips. https://youtu.be/cus4fStDa5c » read more

Building In Functional Safety At The Lowest Hardware Levels Supports Autonomous Driving’s Future


Long before automotive electronic system designers chose artificial intelligence and machine learning as the path toward the future of autonomous driving’s future, it was clear that high-performance computing platforms typically found in data center systems clearly were not going to provide all the answers. Automotive system designers place more emphasis on functional safety and resilience, w... » read more

Intelligent Interconnect Blends Performance, Sensing And Safety In Automotive SoCs


Automobiles are undergoing a dramatic transformation. Autonomous vehicles have debuted, and the stakes for safety are now sky-high. Learn how NetSpeed brings performance, sensing, and safety together for ISO 26262 applications with a fully automated, configurable, correct-by-construction approach where a NoC is optimized with its functional safety (FuSa) features. To read more, click here. » read more

Effective Management Of System Designs


With the advent of the Internet-of-Things (IoT), system designs are slowly but surely becoming more complex. They now use heterogeneous architectures both on the System-on-Chip (SoC) and within a package. These systems typically have multiple different CPU cores, hardware accelerators, memories, network-on-chip (NoC) fabrics and numerous peripheral interfaces. Now, add to this the complexiti... » read more

The Limits Of IP Reuse


The basic business proposition for third-party IP is that it's cheaper, faster, and less problematic to buy rather than build. But things haven't exactly worked out according to plan, either for companies that license IP or those that develop it. For [getkc id="43" kc_name="IP"] licensees, just keeping track of an endless series of updates is becoming unwieldy. Complex designs often include ... » read more

Avoiding Traffic Jams In SoC Design


While sitting in a traffic jam on the way to work, I realized that the sheer volume of vehicles on the road exceeds the capacity originally planned for by civil engineers, when highways first hit the drawing boards 50 or 60 years ago. It dawned on me that there is a parallel to today’s System-on-Chip design—engineers are struggling to close timing on the interconnect during the back-end pla... » read more

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