Co-Packaged Optics In The Data Center


Just because faster Ethernet is added to the data center doesn’t mean existing hardware can utilize it efficiently. Scott Durrant, strategic marketing manager at Synopsys, talks with Semiconductor Engineering about the rapid rollout of faster Ethernet rates, problems in moving data to the front module of the switch and how much energy is required, and what optical technology can bring to the ... » read more

Meeting 112 SerDes Based System Design Challenges


The need for higher bandwidth networking equipment as well as connectivity in the cloud and hyperscale data centers is driving the switch technology transition from 25Tb/s (terabytes) to 51Tb/s and soon to 100Tb/s. The industry has chosen Ethernet to drive the switch market, using 112G SerDes or PHY technology today and 224G SerDes in the future. This article describes how designers can overcom... » read more

High-Performance SerDes Enable The 5G Wireless Edge


Investment at the core of the global internet is red hot. The number of hyperscale data centers jumped to 700 worldwide at the end of 2021, and with more than 300 in the pipeline, should rise to over 1000 by 20241. In the span of five years, total hyperscale data centers will have doubled. And as the raw number shoots up, more powerful compute and networking hardware is rapidly being deployed, ... » read more

CXL and OMI: Competing or Complementary?


System designers are looking at any ideas they can find to increase memory bandwidth and capacity, focusing on everything from improvements in memory to new types of memory. But higher-level architectural changes can help to fulfill both needs, even as memory types are abstracted away from CPUs. Two new protocols are helping to make this possible, CXL and OMI. But there is a looming question... » read more

Why Data Center Power Will Never Come Down


Data centers have become significant consumers of energy. In order to deal with the proliferation of data centers and the servers within them, there is a big push to reduce the energy consumption of all data center components. With all that effort, will data center power really come down? The answer is no, despite huge improvements in energy efficiency. “Keeping data center power consum... » read more

MIPI Standards Gaining Traction In New Markets


An explosion of low-cost, high-performance image sensors for a growing number of applications is propelling the MIPI interface into a variety of new markets, where standardized signal protocols and characteristics are becoming essential. For years, MIPI has been almost synonymous with mobile phones. But as higher-resolution image sensors increasingly are deployed in automotive, AI, IoT, and ... » read more

Heterogeneous Integration Using Organic Interposer Technology


As the costs of advanced node silicon have risen sharply with the 7 and 5-nanometer nodes, advanced packaging is coming to a crossroad where it is no longer fiscally prudent to pack all desired functionality into a single die. While single-die packages will still be around, the high-end market is shifting towards multiple-die packages to reduce overall costs and improve functionality. This shif... » read more

Will Co-Packaged Optics Replace Pluggables?


As optical connections work their way deeper into the data center, a debate is underway. Is it better to use pluggable optical modules or to embed lasers deep into advanced packages? There are issues of convenience, power, and reliability driving the discussion, and an eventual winner isn’t clear yet. “The industry is definitely embracing co-packaged optics,” said James Pond, principal... » read more

Best 112G SerDes IP Architecture


Real world operation of a serializer/deserializer (SerDes) in a hyperscale data center is very demanding and requires robust performance in challenging conditions such as multitude of channel insertion loss, extreme temperature cycles, different types of packages with different trace lengths and discontinuities, etc. Hence, meeting interference tolerance (ITOL) and jitter tolerance (JTOL) compl... » read more

Getting Ready For An Efficient Shift To PCI Express 6.0 Designs With Optimized IP


PCI Express (PCIe) 6.0 technology with key changes will bring about challenges that high-performance computing, artificial intelligence, and storage system-on-chip (SoC) designers will face. This article provides designers a summary of the major changes and how they can be handled to ensure a smooth and successful transition to PCIe 6.0. The three major changes in PCIe 6.0 that designers nee... » read more

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