tag: Synopsys

Chip Industry Week In Review
By The SE Staff - 16 Aug, 2024 - Comments: 0

The U.S. Department of Commerce and Texas Instruments (TI) signed a non-binding preliminary memorandum of terms to provide up to $1.6 billion in CHIPS Act funding towards TI’s investment of over $18 billion for three 300mm semiconductor wafer fabs under construction in Texas and Utah. TI also expects to get about $6 billion to $8 billion from the U.S. Department of Treasury’s Investmen... » read more

Bringing Curvilinear Data To Mask Data Prep
By Al Blais - 15 Aug, 2024 - Comments: 0

Advanced nodes that have been leveraging curvilinear correction with technologies such as ILT and curvilinear OPC are increasingly requiring the use of curvilinear masks to meet advanced feature size and pitch requirements. However, building curvilinear masks with standard OASIS file formats can come at the cost of large file sizes, increased turnaround time, and reduced quality of results. The... » read more

Blog Review: Aug. 14
By Jesse Allen - 14 Aug, 2024 - Comments: 0

Cadence's Dimitry Pavlovsky highlights two new features in the AMBA CHI protocol Issue G update that enhance security of the Arm architecture: Memory Encryption Contexts, which allows data in each Realm in the memory to be encrypted with a different encryption key, and Device Assignment, which introduces hardware provisions to support fully coherent caches in partially trusted remote coherent d... » read more

CPU Performance Bottlenecks Limit Parallel Processing Speedups
By Bryon Moyer - 12 Aug, 2024 - Comments: 0

Multi-core processors theoretically can run many threads of code in parallel, but some categories of operation currently bog down attempts to raise overall performance by parallelizing computing. Is it time to have accelerators for running highly parallel code? Standard processors have many CPUs, so it follows that cache coherency and synchronization can involve thousands of cycles of low-le... » read more

Chip Industry Week In Review
By The SE Staff - 09 Aug, 2024 - Comments: 0

Three Fraunhofer Institutes (IIS/EAS, IZM, and ENAS) launched the Chiplet Center of Excellence, a research initiative to support the commercial introduction of chiplet technology. The center initially will focus on automotive electronics, developing workflows and methods for electronics design, demonstrator construction, and the evaluation of reliability. The UCIe Consortium published the Un... » read more

Ensuring Multi-Die Package Quality And Reliability
By Faisal Goriawalla - 08 Aug, 2024 - Comments: 0

Multi-die designs are gaining broader adoption in a wide variety of end applications, including high-performance computing, artificial intelligence (AI), automotive, and mobile. Despite clear advantages, there are new challenges that need to be addressed for successful multi-die realization. This article gives a high-level overview of the multi-die test challenges that go beyond the design p... » read more

Analog Consolidation Spurs New Round Of Startups
By Bryon Moyer - 08 Aug, 2024 - Comments: 0

A new wave of startups is rising to meet the growing need for specialized analog customization in chip design projects, opening the door to more affordable custom designs. These startups are breathing new life into a sector, which as a result of consolidation has favored only the largest chipmakers. As larger analog companies acquire smaller ones, many companies that were previously engaged ... » read more

Voltage Drop Now Requires Dynamic Analysis
By Karen Heyman - 08 Aug, 2024 - Comments: 0

At one time a relatively infrequent occurrence, voltage drop is now a major impediment to reliability at advanced nodes. Decades ago, voltage drop was only an issue for very large and high-speed designs, where there was concern about supply lines delivering full voltage to transistors. As design margins have tightened in modern advanced designs, controlling voltage drop has become a requiremen... » read more

Blog Review: Aug. 7
By Jesse Allen - 07 Aug, 2024 - Comments: 1

Synopsys' Jyotika Athavale and Randy Fish investigate the problem of silent data corruption caused by difficult-to-detect hardware defects that cause unnoticed errors in the data being processed and is becoming an increasingly pressing problem as computing scales massively at a rapid pace with the demands of AI. Siemens' Keith Felton suggests adopting physical design reuse circuits to provid... » read more

Focus Shifts To Application-Specific Workloads
By Ann Mutschler - 07 Aug, 2024 - Comments: 0

Experts At The Table: EDA has undergone numerous workflow changes over time. Different skill sets have come into play over the years, and at times this changed the definition of what it means to design at the system level. To work out what this means for designers today, and how it looks going forward, Semiconductor Engineering sat down with Michal Siwinski, chief marketing officer at Arteris; ... » read more

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