Japan: Latest Investment Activities


By Dan Tracy and Yoichiro Ando Restructuring and consolidation has led to a new focus for the semiconductor manufacturers in Japan. As a result, the semiconductor equipment market in Japan will experience double-digit growth in both 2013 and 2014, driven by higher spending for memory production and in spending increases planned for the manufacturing of power semiconductors and “More than Moo... » read more

China Foundries Seek Niches


By Mark LaPedus For decades, China has launched several initiatives to modernize its semiconductor industry with hopes of becoming the next IC powerhouse in Asia. In 2001, for example, China unveiled its so-called "Tenth Five-Year Plan," which called for the nation to build 25 new fabs from 2001 to 2005. At the time, the Chinese government hoped to start and fund a new crop of domestic fou... » read more

Materials, Software And Techniques


The future of advanced semiconductor technology is about to split evenly into three different areas. On the leading edge of manufacturing, Applied Materials CEO Mike Splinter called it correctly—it’s all about materials. Just shrinking features isn’t buying much anymore. In fact, at advanced nodes, with extra margin built into designs, it frequently doesn’t buy anything except extra ... » read more

Changes And Challenges


At 130nm, the shift to copper interconnects and 300mm wafer sizes was considered to be the most difficult transition in its long and incredibly efficient history. The next chapter will be even tougher. It’s not that change is a foreign concept to semiconductor design and manufacturing. In fact, it’s probably the only constant over the past 50 years. But in the past, those changes tended ... » read more

MEMS Foundries Play Waiting Game


By Mark LaPedus For years, the foundries in the microelectromechanical systems (MEMS) business have been patiently waiting for the MEMS integrated device manufacturers (IDMs) to outsource some or all of their production. The MEMS foundries are still waiting for that development. Because MEMS are custom devices tuned to a proprietary process and toolset, IDMs still prefer to use their own f... » read more

Manufacturing Bits: July 16


Photon Chips Harvard University, the Massachusetts Institute of Technology (MIT) and the Vienna University of Technology have devised an all-optical transistor controlled by a single photon. The optical transistor could enable the development of photonic quantum gates and deterministic multi-photon entanglement. For years, researchers have been looking to develop an optical transistor, whe... » read more

The Shape Of Things To Come


By Ed Sperling The standard method of designing chips—by shrinking features and turning up the clock frequency—is running out of steam for many companies. It’s too difficult, too expensive, and without a commercially viable new lithography source it may become even more unrealistic for most applications. That certainly doesn’t mean Moore’s Law is ending, but it could become more o... » read more

3D NAND Market Heats Up


By Mark LaPedus It’s the tale of two promising and separate 3D chip architectures. One technology is slowly taking root, while the other one is heating up. 3D stacked-die using through-silicon vias (TSVs) is on the slower path. Advanced chip-stacking has several challenges and is still a few years away from mass production. In contrast, 3D NAND is heating up, as Samsung and SK Hynix are a... » read more

Waiting For 3D Metrology


By Mark LaPedus Over the years, suppliers of metrology equipment have managed to meet the requirements for conventional planar chips. But tool vendors now find themselves behind in the emerging 3D chip era, prompting the urgent need for a new class of 3D metrology gear. 3D is a catch-all phrase that includes a range of new architectures, such as finFET transistors, 3D NAND and stacked-die ... » read more

Ready For 3D-IC


This technical presentation describes the challenges and Mentor's solutions for verifying and testing IC designs targeted for 3D packages, such as stacked die using TSVs or multi-die packages using silicon interposers. To download this white paper, click here. » read more

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