Thermal Damage To Chips Widens


Heat is becoming a much bigger problem for semiconductor and system design, fueled by higher density and the increasing use of complex chips in markets such as automotive, where reliability is measured in decade-long increments. In the past, heat typically was handled by mechanical engineers, who figured out where to put heat sinks, fans, or holes to funnel heat out of a chassis. But as more... » read more

MEMS: Flexible, Reusable Platforms Facilitate Innovation


As the game-changing enabler for whatever the emerging market of widespread fragmented intelligence turns out to look like, the MEMS sector is in some ways the bellwether for much of the greater semiconductor/components supply chain looking to rethink how to serve a wider range of fragmented applications with lower costs and faster time to market. Leaders from Cisco, InvenSense, Nasiri Ventures... » read more

Raise A Fence, Dig A Tunnel, Build A Bridge


There are three main options for chipmakers over the course of the next decade. Which option they choose depends upon their individual needs, talents, and how much and what kind of differentiation they believe will matter to them. The options roughly fall into three categories—fence, bridge or tunnel. The fence option Rather than changing anything, the entire ecosystem can stick to wha... » read more

Advanced IC Packaging Biz Heats Up


After a number of false starts and lackluster adoption, the advanced IC packaging market is finally heating up. On one front, for example, a new wave of chips based on advanced [getkc id="82" kc_name="2.5D"]/[getkc id="42" kc_name="3D"] stacked-die is entering the market. And on another front, the momentum is building for new and advanced 2D packages, such as embedded package-on-package (PoP... » read more

It’s a Materials World, With Positive Forecast


By Michael Fury What’s the latest in materials forecasts for ALD/CVD precursors, CMP consumables, electronic gases, silicon wafers and sputtering targets? Techcet gives us an update. Metal Gate and Electrode Precursors to Double in Five Years Use of front-end Ta and W metal gate and Hf gate dielectric precursors will grow over 2.5x by 2020, according to a new report from Techcet, “20... » read more

Partition Lines Growing Fuzzy


For as long as most semiconductor engineers can remember, chips with discrete functions started out on a printed circuit board, progressed into chip sets when it made sense and eventually were integrated onto the same die. The primary motivations behind this trend were performance and cost—shorter distance, fewer mask layers, less silicon. But this equation has been changing over the past ... » read more

Fab Tool Biz Faces Challenges In 2015


After a slight downturn in 2013, the semiconductor equipment industry rebounded and experienced a solid upturn in 2014. The recovery was primarily driven by tool spending in the foundry and [getkc id="93" kc_name="DRAM"]sectors. Another big and ongoing story continued to unfold in 2014. In late 2013, [getentity id="22817" e_name="Applied Materials"] announced a definitive agreement to acquir... » read more

One-On-One: Mark Bohr


Semiconductor Engineering sat down to discuss process technology, transistor trends, chip-packaging and other topics with Mark Bohr, a senior fellow and director of process architecture and integration at Intel. SE: Intel recently introduced chips based on its new 14nm process. Can you briefly describe the 14nm process? Bohr: It’s our second-generation, tri-gate technology. So it has al... » read more

Different Approaches Emerge For Stacking Die


The concept of stacking die to shorten wires, improve performance, and reduce the amount of energy required to drive signals has been in research for at least the past dozen years at both IBM and Intel. And depending upon whom you ask, it could be another 2 to 10 years before it becomes a mainstream packaging approach—if it happens at all. At least part of the confusion stems from how you ... » read more

Wireless 3D Stacking


Hot Chips 26 wrapped up this week and there were many interesting presentations. One of the many presentations that caught my attention was given by Dave Ditzel, CEO of ThruChip, and is titled, “Low-Cost 3D Chip Stacking with ThruChip Wireless.” The technology is as it sounds — a wireless communication path for stacked die. The first question you may be asking is, ‘Why would anyone w... » read more

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