tag: test

Improving Test Pattern Compression With Tessent VersaPoint Test Point Technology
By Mentor, a Siemens Business - 09 Dec, 2019 - Comments: 0

Mission-critical applications within markets such as transportation and medical devices require higher overall manufacturing test quality, but that often means more test patterns, data volume, and longer test times. Embedded test compression helps, but using VersaPoint test point technology results in 46X compression ration over what is possible with Tessent TestKompress alone. To read more,... » read more

Six Things You Need To Know About USB Instrument Control
By NI - 09 Dec, 2019 - Comments: 0

With plug-and-play connectivity and the near ubiquity of USB ports on modern PCs and laptops, USB has become a popular choice for controlling stand-alone instrumentation. As more instrument manufacturers begin to include USB ports on their devices, it is important to understand several issues surrounding USB to ensure the longevity of your test system. To read more, click here. » read more

Using Digital Twins And DL In Lithography
By Ed Sperling - 21 Nov, 2019 - Comments: 0

Leo Pang, chief product officer and executive vice president at D2S, looks at the results of inverse lithography technology at advanced nodes using curvilinear patterns, and how that can be combined with a digital twin and deep learning speed up time to market and reduce cost. » read more

AI’s Blind Spots
By Ed Sperling - 12 Nov, 2019 - Comments: 1

The rush to utilize AI/ML in nearly everything and everywhere raises some serious questions about how all of this technology will evolve, age and perform over time. AI is very useful at doing certain tasks, notably finding patterns and relationships in broad data sets that are well beyond the capabilities of the human mind. This is very valuable for adding efficiency into processes of all so... » read more

A Breakthrough In Silicon Bring-Up
By Matthew Knowles - 12 Nov, 2019 - Comments: 1

The current semiconductor market is seeing increasingly complex silicon devices for applications like 5G wireless communications, autonomous driving, and artificial intelligence. One of the ways designers are working to control design time and cost is through the adoption of IJTAG (IEEE 1687) for a plug-and-play style IP integration during design. The benefits of using IJTAG are still emerging,... » read more

Leveraging Data In Chipmaking
By Ed Sperling - 12 Nov, 2019 - Comments: 0

John Kibarian, president and CEO of PDF Solutions, sat down with Semiconductor Engineering to talk about the impact of data analytics on everything from yield and reliability to the inner structure of organizations, how the cloud and edge will work together, and where the big threats are in the future. SE: When did you recognize that data would be so critical to hardware design and manufact... » read more

How 5G Affects Test
By Ed Sperling - 11 Nov, 2019 - Comments: 0

David Hall, head of semiconductor marketing at National Instruments, talks with Semiconductor Engineering about architectural changes to infrastructure due to the rollout of 5G and how the move from macrocells to small cells is changing test requirements.         Subscribe to Semiconductor Engineering's YouTube Channel here » read more

The Single Best DFT Move You Can Make
By Jay Jahangiri - 08 Oct, 2019 - Comments: 0

A proven method to simplify a complex problem is to break it into smaller chunks. In the case of today’s large, complex SoCs, this means using hierarchical methods to design the blocks, then combine the results at the top level. While this sounds obvious, it hasn’t always been practical or technologically feasible to perform some tasks, like DFT, at the block level and translate that work s... » read more

From Womb To Tomb: A Lifetime Of Chip Data In A Common Language
By Noam Brousard - 08 Oct, 2019 - Comments: 0

Every integrated circuit (IC) has a lifetime of stories to tell. From design through the end of a chip’s life, it can let us know what’s happening all along the way, providing we give it a voice and the language to do so. But until we can gain access to this data, the lives of these ICs remain secret. In-chip monitoring opens up those secrets. It helps to optimize performance, and it is esp... » read more

The Unexpected Impact Of Lots On Hold
By Marie Ryan - 08 Oct, 2019 - Comments: 0

One of the biggest bottlenecks in any Subcon is Lots on Hold. The problem occurs many times a week on most factory floors. It’s something you’ve grown to loathe or endure. But, is there something you can do to reduce the amount of time lots spend on hold? In this article, we will explain what Lots on Hold are and how you can make the process less painful for your team and help improve on-ti... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy