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Brighter Future For Photonics

Will progress in 3D stacking translate into increased opportunities for photonics chips? Progress still has to be made in several areas.

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Photons increasingly are taking over where electrons are failing in communications, but mixing the two never has been easy.

There always have been two potential implementation paths — building each on its own substrate and then stacking them, or building them on a single substrate. The tradeoff between the two solutions is more complex than it may initially appear, and ongoing improvements in one area may lead to less funding for the other.

There are several important areas where photonics comes into play. Some are at the extremities where analog – light – is converted to and from digital electronics. This is basically the sensor and display markets, and this is following its own path. The real driver for photonics is the insatiable desire for bandwidth. Networking, especially in the data centers, is making everything faster, but it also is enabling new capabilities. Consider speech recognition systems that rely on the cloud for inferencing. This require blazingly fast computation as well as minimal latency, such that it appears as if things are happening in real time – locally.

According to analytics companies, the photonics IC market was about $190M in 2013, grew to about $539M in 2017, and is expected to reach between $1.3B and $1.8B by 2022. That is a CAGR of well over 20% and one of the fastest growing portions of the overall semiconductor market.

Communications solutions based on electronics are struggling to provide the necessary speed with an acceptable power and cost. Photons initially replaced electrons for long haul communications, but today, most communications between racks has also become photonic. It is probably only a matter of time before photons replace electrons on the board or even within a package.

But photonics is not only about communications. It can be used for computation, as well, and can do some types of computation much more efficiently than electronics. It may also be an enabler for quantum computing.

“Datacomms wants to get to the Terra-bit/s range,” says Martin Eibelhuber, deputy head of business development for EV Group. “This requires a minimum of eight different laser wavelengths, and this increases the complexity. There are discussions suggesting that light is the way to go for quantum computing. Use cases are expanding and increasing the complexity. The industry is raising the question of where else it can be used, such as between a memory and a chip where they are very close.”

Packaging
In a typical photonics system today, the photonics die and electronics die are built separately and then bonded together. Packaging costs tend to dominate total cost for these types of solutions. Intel has reported it to be 80% of the total product cost, but that formula is changing. As 3D bonding in the electronics space becomes more widespread, cheaper, and more reliable, these costs are likely to come down. If that trend continues and some of those improvements provide benefits to the bonding of photonics chips, then the cost reduction impact to those systems will be even greater.

“As cost and manufacturing concerns are being resolved, more and more design houses are giving this a try,” says Tarek Ramadan, technical marketing lead for Calibre 3D-IC applications at Mentor, a Siemens Business. “However, EDA support becomes crucial. EDA companies need to put in the resources and effort to figure out how to really help the designers have enough confidence in their 3D packaging designs to be manufactured with an acceptable yield, and the foundries and 3D packaging houses (OSATs) need to play their part and partner with the EDA companies to develop assembly design kits. When it comes to 3D packaging, the concept of a design kit is fairly new. So the effort is not to be under-estimated. At the end of the day, the designer wants the design kit to be qualified by the manufacturer. Even better, it should be delivered by the foundry/3D packaging house instead of the EDA vendor.”

The premise is that each die is developed separately, but as complexity increases, that becomes more difficult. “The constraints of the package should be reflected when the photonics designer builds his die,” adds Ramadan. “This is not easy. The industry has been avoiding the need for ‘co-design’ for a long time because it introduces all kinds of challenges. In most design houses today, the responsibility of 3D packaging goes to the packaging teams by default. However, as co-design challenges emerge, there should be a separate system-level team who own and manage the co-design aspects of the 3D packaging.”

And there is no way to fully separate the photonics and the electronics. “Whenever you have optical signals, you have to manipulate them,” says EV Group’s Eibelhuber. “Typically, this is done electronically. Today, the market focus is to integrate the laser onto a silicon platform using stacking, but eventually it will move to combine it with the CMOS electronics.”

Silicon integration
Silicon photonics is highly attractive because it promises lower cost, higher levels of integration, better reliability, and several other benefits compared to legacy optics. Also, if issues such as test and alignment can be resolved, it could fundamentally alter the fabrication cost structure, potentially enabling its usage in additional markets.

“Silicon surrounded by silicon-oxide makes an almost ideal waveguide material, meaning optical signals can travel through it with very little degradation,” says John Ferguson, marketing director at Mentor. “This is a critical element in the creation of silicon photonics designs. While we certainly have had successes over the past decade, why haven’t silicon photonics ICs (PICs) been more readily adopted on a larger scale? With all their advantages (transmission speed, low power usage, older proven processes, etc.), combined with the cost efficiencies of silicon wafer production, why haven’t they taken over the market yet?”

Gilles Lamant, distinguished engineer at Cadence, provides part of the answer. “The curvilinear layout of PIC components presents one of the toughest design challenges. Waveguide routing requires a curved format instead of rectilinear/Manhattan-style routing to ensure that light stays in a waveguide. Layouts for mask fabrication are polygon-based and defined on a grid with a given resolution. Therefore, the discretization of curvilinear shapes like a circle, or bend, has to be properly defined to keep a smooth sidewall.”

This issue is being tackled by the EDA vendors. Another issue related to size. “If you have IC components that need an advanced process node — really anything from, say, 28nm and below — then you have to pay a premium to get those manufactured,” says Ramadan. “That is due to the complexities involved with manufacturing. The smaller the process node, the more costly the impacts are. But photonics will gain very little from changes to process nodes. Since photonic components are very large compared to electronic components, putting everything onto a single die will require a very large silicon area, at a high cost premium, when only a small portion of the die actually benefits.”

Still, the biggest issue is that silicon cannot be used to build lasers. This is because silicon has an indirect band-gap that is a very inefficient light emitter. That leaves only two solutions. The first is a reversion to the packaging solution, where the laser is mounted as a flip-chip, but this means the alignment issues remain. The second approach is to use wafer-level integration by bonding or deploying epitaxial regrowth of an indium phosphide chip to the silicon, and then processing it with traditional lithographic techniques.

In reality, the future is probably a hybrid solution between the two approaches. “Simple P-N junctions or resistive heaters, along with their controllers, are integral to controlling the optical behavior,” says Ramadan. “These typically can be built with more established and less costly process nodes. Putting these all together onto a large silicon die area, with lots of open space, gives an opportunity to use that space to stack and connect multiple-dies with a silicon interposer-style package. This seems to be the path most photonic designs are now taking.”

Resistive heaters are a necessary aspect for photonics. “Optics tends to drift quite fast and to stabilize it, the temperature ranges have to be more controlled than they are for electronics,” says EV Group’s Eibelhuber. “This has to be considered in design. For devices in markets such as automotive, where you have big variations in temperatures, this could be even more challenging.”

Necessary aspects of codesign range across several areas. “We know that heat and stress can alter optical behavior,” says Ramadan. Stacking dies on top of the photonics may have unintended consequences. Avoiding those consequences implies more co-design analysis techniques, and while the capabilities all generally exist, there has not been a consolidated effort to validate their use and accuracy in a photonic setting.”

More tools needed
There are several areas in which the tools still need to improve. “Photonic circuit modeling is a challenge, particularly since there isn’t a widely accepted SPICE equivalent for modeling and simulation of complicated optical signals,” says Cadence’s Lamant. “Compared to an electrical signal, an optical signal is bidirectional and multi-mode, and a simulator needs to be able to handle both amplitude and phase. Simulation in both the frequency and the time domain is also required. Traditional SPICE simulators typically are unable to meet these requirements.”

This has quite a few implications. “The industry will continue to struggle if the manufacturing party (foundry or OSAT) can’t deliver a complete assembly design kits down to the physical verification, electrical analysis and reliability analysis aspects — or at least deliver what we define as an EDA reference flow,” says Ramadan. “With a push from end customers, there has been reasonable progress on this. Leading foundries/OSATs are working with the EDA vendors to build the reference flows and make them available to the customers. Kits for production support are starting to emerge, as well.”

Production support kits from the foundry/OSATs are important as they guarantee a good yield. In contrast, reference flows are just examples to follow. “Still, the kits/reference flows don’t usually include the reliability aspects that are needed in 3D packaging,” continues Ramadan. “For dies that are stacked or put side-by-side in a package, thermal and stress analysis during the design and verification step are needed.”

But even if manufacturing costs come down, the cost of photonics never will follow the cost curve for electronics. “There is a question about how to make them cost-efficient enough that it would enable bigger markets,” says Eibelhuber. “I am not sure if it can scale to enough volume that the costs would drop similar to CMOS. There is no Moore’s Law for optics. You cannot shrink the optical components as much as transistors. So it is not clear if you can get the costs down, which is necessary to get them into a wider range of markets.”

But there are high value markets to which photonics may expand. “Quantum computing is one possibility,” adds Eibelhuber. “Most companies working in this field are unwilling to talk too much about what they are doing today, but I would say that calculating with photons is the most realistic way to have quantum computing at acceptable temperatures. Other approaches need temperatures around 100°C and more.”

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3 comments

QuantumGrouch says:

Most commercial quantum computing technologies need cryogenic temperatures, milli-Kelvin or below! Not 100C! Just getting signals in and out is a problem. Photonics can help, but right now the R&D is academic and competes with the commercial R&D!

Dan Randenburg says:

Brian,

Just want to say that you have an excellent article l have bbeen doing quantum photonics ftee space radio communications research for many years. You have certainly inspired me to continue on. Just recently I was doing work on the project and saw a 1000% increase in signal transfer. This was noticed just by canging detector device technology. If anyone would like to know more about this recent breakthru in free space radio communications, just email me.

Recai Iskender, recai.rocky.iskender@gmail.com Glover Park, Washington DC says:

Greetings everybody, I think artificial reasoning on quantum chip is the future. Vicarious robotics already developed their Visual Cognitive Computing system. I am seeking like-minded people to discuss how to build a Conceptual Cognitive Computing doubled up with photonic chips. We can put concepts on a Generative Adversarial Network (GAN) reinforced learning system which can self-learn simple visual and all relationship concepts and speed up to super complex scientific concepts. This Conceptual Reasoning Computing can be done on current classical computers. But we need photonic quantum computing to overcome bandwidth problems. Photonic chip designing and manufacturing can be solved easily. This is photonic chip waveguide simulation problem which can easily be solved with the newly developed AI simulation method which brings billion times faster and more efficient simulation for all kinds of scientific domains. Please google them. Best regards.

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