Dealing With Security Holes In Chips


Semiconductor Engineering sat down to discuss security risks across multiple market segments with Helena Handschuh, security technologies fellow at Rambus; Mike Borza, principal security technologist for the Solutions Group at Synopsys; Steve Carlson, director of aerospace and defense solutions at Cadence; Alric Althoff, senior hardware security engineer at Tortuga Logic; and Joe Kiniry, princi... » read more

The Advantages Of MBSE-Driven E/E Architecture


Vehicles in all sectors are growing in complexity as OEMs develop sophisticated platforms with growing levels of automation and connectivity. To cope with this growing complexity, automotive, aerospace and commercial vehicle OEMs must evolve their architectural design processes to leverage MBSE and the digital thread. Today’s E/E system engineering solutions help companies implement MBSE by p... » read more

More Multiply-Accumulate Operations Everywhere


Geoff Tate, CEO of Flex Logix, sat down with Semiconductor Engineering to talk about how to build programmable edge inferencing chips, embedded FPGAs, where the markets are developing for both, and how the picture will change over the next few years. SE: What do you have to think about when you're designing a programmable inferencing chip? Tate: With a traditional FPGA architecture you ha... » read more

Medical, Industrial & Aerospace IC Design Changes


Medical, industrial and aerospace chips are becoming much more complex as more intelligence is added into these devices, forcing design teams to begin leveraging tools and methodologies that typically have been used only at the leading-edge nodes for commercial applications. But as with automotive, the needs of these systems are changing quickly. In addition to strict quality, safety and sec... » read more

What’s In Your IP?


Jeff Markham, software architect at ClioSoft, talks with Semiconductor Engineering about IP traceability in markets such as automotive and aerospace, what’s actually in IP, what should not be in that IP from a security standpoint, and how all of this data can used to avert system reliability issues in the future. » read more

Ensuring Functional Safety In Design


Mohammed Abdelwahid (Ali), automotive logic test product manager at Mentor, a Siemens Business, discusses how to maximize coverage in the different ASIL standards for logic BiST, how to make testing more efficient, and what impact that has on area and test time. » read more

Testing Autonomous Vehicles


Jeff Phillips, head of automotive marketing at National Instruments, talks about how to ensure that automotive systems are reliable and safe, how test needs to shift to adapt to continual updates and changes, and why this is particularly challenging in a world where there is no known right answer. » read more

Challenges In IP Reuse


Jeff Markham, software architect at ClioSoft, explains why IP reuse is so important in advanced process node SoC chip designs, what companies need to keep track of when working with third-party IP, and how it needs to be characterized. » read more

Optimizing Hardware Faster


Maximillian Odendahl, CEO of Silexica, sat down with Semiconductor Engineering to talk about high-level synthesis and the changing role of this technology. What follows are excerpts of that conversation. SE: What is the direction that high-level synthesis is heading in? Odendahl: The direction hasn’t changed, but in the past HLS was not usable by the software guys. The main push right n... » read more

New Challenges In Testing 5G Devices


Alejandro Buritica, senior solutions marketing manager at National Instruments, talks about what will be needed for mass-market testing of 5G devices, how to focus signals to overcome signal attenuation, and how to make over-the-air testing viable where leads are not exposed. » read more

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