What’s Next For Through-Silicon Vias

By Laura Peters - 06 Jan, 2025 - Comments: 0

From large TSVs for MEMS to nanoTSVs for backside power delivery, cost-effective process flows for these interconnects are essential for making 2.5D and 3D packages more feasible. Through-silicon vias (TSVs) enable shorter interconnect lengths, which reduces chip power consumption and latency to carry signals faster from one device to another or within a device. Advanced packaging technology... » read more

Navigating Increased Complexity In Advanced Packaging

By Gregory Haley - 17 Dec, 2024 - Comments: 1

As chips evolve toward stacked, heterogeneous assemblies and adopt more complex materials, engineers are grappling with new and often less predictable sources of variation. This is redefining what it means to achieve precision, forcing companies to rethink everything from process control and in-line metrology to materials selection and multi-level testing. These assemblies are the result of ... » read more

Monolithic Vs. Heterogeneous Integration

By Ed Sperling - 24 Oct, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss two very different paths forward for semiconductors and what's needed for each, with Jamie Schaeffer, vice president of product management at GlobalFoundries; Dechao Guo, director of advanced logic technology R&D at IBM; Dave Thompson, vice president at Intel; Mustafa Badaroglu, principal engineer at Qualcomm; and Thomas Po... » read more

Scalability of Nanosheet Oxide FETs for Monolithic 3-D Integration

By Technical Paper Link - 22 Oct, 2024 - Comments: 0

A new technical paper titled "High-Field Transport and Statistical Variability of Nanosheet Oxide Semiconductor FETs With Channel Length Scaling" was published by researchers at The University of Tokyo and Nara Institute of Science and Technology. Abstract "We have investigated the scaling potential of nanosheet oxide semiconductor FETs (NS OS FETs) for monolithic 3-D (M3D) integration in t... » read more

Improving The Gate Oxide Reliability in Gate First HKMG DRAM Structures (Sungkyunkwan Univ., Samsung)

By Technical Paper Link - 11 Oct, 2024 - Comments: 0

A new technical paper titled "Novel STI Technology for Enhancing Reliability of High-k/Metal Gate DRAM" was published by researchers at Sungkyunkwan University and Samsung Electronics. Abstract: "The challenges associated with semiconductor are increasing because of the rapid changes in the semiconductor market and the extreme scaling of semiconductors, with some processes reaching their te... » read more

Sidestepping Lithography In Chip Manufacturing

By Katherine Derbyshire - 23 May, 2024 - Comments: 0

Rising lithography costs, shrinking feature sizes, and the need for an alternative to copper are collectively spurring new interest in area-selective deposition. An extension of atomic layer deposition, ASD seeks to build circuit features from the bottom up, without relying on lithography. Lithography will remain a critical tool for the foreseeable future. But it has long been the most expen... » read more

Enabling Advanced Devices With Atomic Layer Processes

By Katherine Derbyshire - 18 Apr, 2024 - Comments: 2

Atomic layer deposition (ALD) used to be considered too slow to be of practical use in semiconductor manufacturing, but it has emerged as a critical tool for both transistor and interconnect fabrication at the most advanced nodes. ALD can be speeded up somewhat, but the real shift is the rising value of precise composition and thickness control at the most advanced nodes, which makes the ext... » read more

Performing Multiple, Simultaneous Depositions In A High-Throughput, Multiplexing ALD/MLD-Style Reactor

By Technical Paper Link - 22 Feb, 2024 - Comments: 0

A technical paper titled “High throughput multiplexing reactor design for rapid screening of atomic/molecular layer deposition processes” was published by researchers at University of Washington. Abstract: "An approach is demonstrated for performing multiple, simultaneous depositions in a high-throughput, multiplexing atomic layer deposition/molecular layer deposition (ALD/MLD)-style reac... » read more

How To Fine-Tune Large-Area Molybdenum Disulfide Atomic Layer Deposition At 150°C

By Technical Paper Link - 19 Jul, 2023 - Comments: 0

A technical paper titled "Toolbox of Advanced Atomic Layer Deposition Processes for Tailoring Large-Area MoS2 Thin Films at 150 °C" was published by researchers at Eindhoven University of Technology, University of Michigan, and University College Cork. Abstract: "Two-dimensional MoS2 is a promising material for applications, including electronics and electrocatalysis. However, scalable meth... » read more

Design of Selective Deposition Processes For Nanoscale Electronic Devices

By Technical Paper Link - 27 Jun, 2023 - Comments: 0

A technical paper titled “Quantified Uniformity and Selectivity of TiO2 Films in 45-nm Half Pitch Patterns Using Area-Selective Deposition Supercycles” was published by researchers at IMEC, North Carolina State University, and KU Leuven. Abstract: "Area-selective deposition (ASD) shows great promise for sub-10 nm manufacturing in nanoelectronics, but significant challenges remain in scali... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

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