Extending The Benefits Of UVM To Include AMS: An Update On Accellera’s UVM-AMS Standard Development

By Tom Fitzpatrick - 04 Oct, 2022 - Comments: 0

By Tom Fitzpatrick and Peter Grove SoC teams can be divided up into design and verification groups. For digital designs, the Universal Verification Methodology (UVM), initially developed by Accellera and now standardized as IEEE 1800.2, has been the industry standard for the past decade. Since most SoC designs also have analog and mixed-signal IP blocks, it would be ideal for verification en... » read more

Efficient Verification Of Mixed-Signal Series IP Using UVM

By Cadence - 21 Sep, 2022 - Comments: 0

Interface IP are an integral part of systems-on-chips (SoC) that include mobile, automotive, or networking applications and are primarily used for transmitting data over a physical medium between a host and device. The mixed-signal nature of the IP makes verification a challenging task, requiring special considerations for digital and analog sections. This paper describes a robust mixed-signal ... » read more

Bringing RFIC Design And Verification Into The Modern Era

By Jian Yang - 09 Jun, 2022 - Comments: 0

For decades, developers of radio frequency (RF) chips and other analog/mixed-signal (AMS) integrated circuits (ICs) have used traditional techniques for design and verification. Most RFIC designers have continued to hand-craft active and passive devices, manually place and route their circuits, and rely on the bring-up lab to validate their pre-silicon SPICE simulations. It is often said that a... » read more

The Value Of RF Harmonic Balance Analyses For Analog Verification

By Pradeep Thiagarajan - 24 Mar, 2022 - Comments: 0

By Pradeep Thiagarajan and Scott Guyton The world we live in is intricately connected by electronic systems that are expected to function flawlessly to satisfy consumer needs. Functionality violations beyond certain tolerance levels are frowned upon and negatively impact the quality level of products. These systems are required to function accurately, in tandem with other interdependent syst... » read more

Radio Frequency Technology Is Found Everywhere In Daily Life

By Greg Curtis - 27 Aug, 2020 - Comments: 0

By Greg Curtis and YuLing Lin Innovation is everywhere around us. From high-performance computing, communications, autonomous driving, and the Internet of Things (figure 1), each segment has led to a rapid increase in design innovation. This innovation has been particularly true in communications, as Radio Frequency (RF) technology is found everywhere in daily life. RF technology is critical... » read more

Plan-Based Analog Verification Methodology

By Cadence - 27 May, 2020 - Comments: 0

The ability to verify all the aspects of an analog design and to keep track of all the different verification tasks is a growing challenge. Manual attempts to do so often lead to mistakes since they rely on constantly updated documents. The Cadence Virtuoso ADE Verifier provides an overarching verification plan that links to all analog tests across multiple designers. The Virtuoso ADE Verifier ... » read more

Culture Clash In Analog

By Ann Mutschler - 29 Oct, 2015 - Comments: 2

The analog/mixed signal world is being shaken up by a mix of new tools, an influx of younger engineers with new and broader approaches, and an emphasis on changing methodologies to improve time to market. Analog and digital engineers have never quite seen eye-to-eye. Analog teams leverage techniques that have been around, in some cases, for decades, while digital teams rely heavily on the la... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.