tag: analog

High-Performance 5G IC Designs Need High-Performance Parasitic Extraction
By Karen Chow - 23 Jun, 2022 - Comments: 0

By Karen Chow and Salma Ahmed Elhenedy We are rapidly approaching a future where 5G telecommunications will be the norm. With its increased data speeds and bandwidth, 5G has the potential to change the way we live our lives. But what does that mean for the average person? Think about cellphones, for one. You don't just use your phone for calling or texting anymore—you surf the web, chec... » read more

Simulation Framework to Evaluate the Feasibility of Large-scale DNNs based on CIM Architecture & Analog NVM
By Technical Paper Link - 10 Jun, 2022 - Comments: 0

Technical paper titled "Accuracy and Resiliency of Analog Compute-in-Memory Inference Engines" from researchers at UCLA. Abstract "Recently, analog compute-in-memory (CIM) architectures based on emerging analog non-volatile memory (NVM) technologies have been explored for deep neural networks (DNNs) to improve scalability, speed, and energy efficiency. Such architectures, however, leverage ... » read more

Can Analog Make A Comeback?
By Brian Bailey - 09 Jun, 2022 - Comments: 3

We live in an analog world dominated by digital processing, but that could change. Domain specificity, and the desire for greater levels of optimization, may provide analog compute with some significant advantages — and the possibility of a comeback. For the last four decades, the advantages of digital scaling and flexibility have pushed the dividing line between analog and digital closer ... » read more

Bringing RFIC Design And Verification Into The Modern Era
By Jian Yang - 09 Jun, 2022 - Comments: 0

For decades, developers of radio frequency (RF) chips and other analog/mixed-signal (AMS) integrated circuits (ICs) have used traditional techniques for design and verification. Most RFIC designers have continued to hand-craft active and passive devices, manually place and route their circuits, and rely on the bring-up lab to validate their pre-silicon SPICE simulations. It is often said that a... » read more

AI-Powered Verification
By Brian Bailey - 01 Jun, 2022 - Comments: 1

With functional verification consuming more time and effort than design, the chip industry is looking at every possible way to make the verification process more effective and more efficient. Artificial intelligence (AI) and machine learning (ML) are being tested to see how big an impact they can have. While there is progress, it still appears to be just touching the periphery of the problem... » read more

Analog Edge Inference with ReRAM
By Technical Paper Link - 02 May, 2022 - Comments: 0

Abstract "As the demands of big data applications and deep learning continue to rise, the industry is increasingly looking to artificial intelligence (AI) accelerators. Analog in-memory computing (AiMC) with emerging nonvolatile devices enable good hardware solutions, due to its high energy efficiency in accelerating the multiply-and-accumulation (MAC) operation. Herein, an Applied Materials... » read more

The Value Of RF Harmonic Balance Analyses For Analog Verification
By Pradeep Thiagarajan - 24 Mar, 2022 - Comments: 0

By Pradeep Thiagarajan and Scott Guyton The world we live in is intricately connected by electronic systems that are expected to function flawlessly to satisfy consumer needs. Functionality violations beyond certain tolerance levels are frowned upon and negatively impact the quality level of products. These systems are required to function accurately, in tandem with other interdependent syst... » read more

Siemens EDA’s Full-Flow Portfolio Helps Engineers Achieve Optimum IC Design Verification Efficiency
By Siemens EDA - 24 Mar, 2022 - Comments: 0

A quick overview of the front-end flow using the S-Edit schematic capture environment will be covered in this white paper, followed by a more detailed description and steps for using the Analog FastSPICE (AFS) platform simulator to go through the verification of a basic amplifier design. Greater efficiency in analog design verification can now be achieved using our enhanced inter-tool commun... » read more

Rotating neurons for all-analog implementation of cyclic reservoir computing
By Technical Paper Link - 23 Mar, 2022 - Comments: 0

Abstract "Hardware implementation in resource-efficient reservoir computing is of great interest for neuromorphic engineering. Recently, various devices have been explored to implement hardware-based reservoirs. However, most studies were mainly focused on the reservoir layer, whereas an end-to-end reservoir architecture has yet to be developed. Here, we propose a versatile method for implemen... » read more

Reliability Concerns Shift Left Into Chip Design
By Ann Mutschler - 22 Dec, 2021 - Comments: 1

Demand for lower defect rates and higher yields is increasing, in part because chips are now being used for safety- and mission-critical applications, and in part because it's a way of offsetting rising design and manufacturing costs. What's changed is the new emphasis on solving these problems in the initial design. In the past, defectivity and yield were considered problems for the fab. Re... » read more

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