tag: ANSYS

Blog Review: Oct. 9
By Jesse Allen - 09 Oct, 2019 - Comments: 0

In a video, Cadence's Tom Hackett continues his introduction to finite element analysis (FEA) and the important role it can play in electronics deign. Mentor's Colin Walls considers dynamic memory allocation in real-time operating systems and the problems of non-deterministic behavior and ill-defined failure modes. Synopsys' Taylor Armerding contends that ethical hackers are a necessary p... » read more

Shrinking AV’s 1 Billion Test Miles
By Kevin Fogarty - 08 Oct, 2019 - Comments: 0

There is still no answer to how many miles an autonomous vehicle needs to drive before it's proven safe. But some AV developers and test companies are hoping to ease the burden a bit with automation that makes millions of real and simulated miles of road testing simpler to implement, supported by standards that make it easier to create and trade simulation scenarios. The goal is to reduce th... » read more

Week In Review: Design, Low Power
By Jesse Allen - 04 Oct, 2019 - Comments: 0

Synopsys completed its acquisition of QTronic GmbH, a provider of simulation, test tools, and services for automotive software and systems development. Terms of the deal were not disclosed. Synopsys launched the PrimeECO design closure solution, a signoff-driven solution that the company says achieves signoff closure with zero iterations. The tool includes a machine-learning-driven Hybrid Ti... » read more

New Security Risks Create Need For Stealthy Chips
By Ed Sperling - 03 Oct, 2019 - Comments: 0

Semiconductors are becoming more vulnerable to attacks at each new process node due to thinner materials used to make these devices, as well as advances in equipment used to simulate how those chips behave. Thinner chips are now emitting light, electromagnetic radiation and various other types of noise, which can be observed using infrared and acoustic sensors. In addition, more powerful too... » read more

Blog Review: Oct. 2
By Jesse Allen - 02 Oct, 2019 - Comments: 0

In a video, Cadence's Tom Hackett explains finite element analysis by looking at a simple model of a bridge and showing why FEA techniques are required for analysis of real-world structures. Synopsys' Taylor Armerding examines why the 156-year-old False Claims Act has new relevance when companies are accused of failing to meet cybersecurity standards. Mentor's Colin Walls demystifies memo... » read more

Security Tradeoffs In A Shifting Global Supply Chain
By Ed Sperling - 30 Sep, 2019 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss a wide range of hardware security issues and possible solutions with Norman Chang, chief technologist for the Semiconductor Business Unit at ANSYS; Helena Handschuh, fellow at Rambus, and Mike Borza, principal security technologist at Synopsys. What follows are excerpts of that conversation. The first part of this discussion ca... » read more

Week In Review: Design, Low Power
By Jesse Allen - 27 Sep, 2019 - Comments: 0

eSilicon debuted its 7nm high-bandwidth interconnect (HBI)+ PHY IP, a special-purpose hard IP block that offers a high-bandwidth, low-power and low-latency wide-parallel, clock-forwarded PHY interface for 2.5D applications such as chiplets. HBI+ PHY delivers a data rate of up to 4.0Gbps per pin. Flexible configurations include up to 80 receive and 80 transmit connections per channel and up to 2... » read more

Open ISAs Gaining Traction
By Ann Mutschler - 26 Sep, 2019 - Comments: 0

Open instruction set architectures are starting to gain a foothold, often in combination with other processors, as chipmakers begin to add more specialized compute elements and more flexibility into their designs. There are a number of these open ISAs available today, including Power, MIPS, and RISC-V, and there are a number of permutations and tools available for sale based on those archite... » read more

Why Data Is So Difficult To Protect In AI Chips
By Ed Sperling - 25 Sep, 2019 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss a wide range of hardware security issues and possible solutions with Norman Chang, chief technologist for the Semiconductor Business Unit at ANSYS; Helena Handschuh, fellow at Rambus, and Mike Borza, principal security technologist at Synopsys. What follows are excerpts of that conversation. The first part of this discussion ca... » read more

Blog Review: Sept. 25
By Jesse Allen - 25 Sep, 2019 - Comments: 0

Mentor's Dave Rich points out that unexpected values from a constraint solver can often be explained by how Verilog expression evaluation rules affect the solution space of SystemVerilog constraints. Cadence's Madhavi Rao points to the need for new and updated safety and cybersecurity standards for autonomous vehicles and highlights one of the most challenging parts of AV deployment. A Sy... » read more

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