New Approaches To Power Decoupling


Decoupling capacitors have long been an important aspect of maintaining a clean power source for integrated circuits, but with noise caused by rising clock frequencies, multiple power domains, and various types of advanced packaging, new approaches are needed. Power is a much more important factor than it used to be, especially in the era of AI. “Doing an AI search consumes 10X the power t... » read more

Blog Review: Oct. 23


Cadence’s Sanjeet Kumar introduces the message bus interface in the PHY Interface for the PCIe, SATA, USB, DisplayPort, and USB4 Architectures (PIPE) specification, which provides a way to initiate and participate in non-latency-sensitive PIPE operations using a small number of wires. Siemens’ Dennis Brophy argues that the recently published Portable Test and Stimulus Standard (PSS) 3.0 ... » read more

How Big A Deal Is Aging?


Nothing lasts forever, but in the semiconductor world things used to last long enough to become obsolete long before their end of life. That's no longer the case with newer nodes, and it is raising concerns in safety-critical markets such as automotive. Being able to fully understand what happens inside of chips is still a work in progress, and analysis approaches are trying to keep up. Unti... » read more

Cloud Or On-premises? Why Not Both: A Hybrid Approach For Structure Simulation


Faced with large problem sizes and urgent deadlines, it’s not surprising that more and more product development teams are accessing high-performance computing (HPC) resources on the cloud. After all, a cloud computing model enables you to access the most advanced, leading-edge software and hardware on demand. There are no queues or wait times. Users can “dial up” core counts and other set... » read more

Mass Customization For AI Inference


Rising complexity in AI models and an explosion in the number and variety of networks is leaving chipmakers torn between fixed-function acceleration and more programmable accelerators, and creating some novel approaches that include some of both. By all accounts, a general-purpose approach to AI processing is not meeting the grade. General-purpose processors are exactly that. They're not des... » read more

New Challenges In IC Reliability


Experts at the Table: Semiconductor Engineering sat down to discuss reliability of chips, how it is changing, and where the new challenges are, with Steve Pateras, vice president of marketing and business development at Synopsys; Noam Brousard, vice president of solutions engineering at proteanTecs; Harry Foster, chief verification scientist at Siemens EDA; and Jerome Toublanc, high-tech soluti... » read more

Security Concerns Weigh Down Open-Source EDA


Open-source EDA tools are free, readily available, and growing in numbers, but many chipmakers are wary of using them due to security concerns. On the plus side, proponents say these tools can help attract fresh new talent to chip design. Yet despite their spread online — GitHub alone has more than 140 EDA-specific repositories — using visible source code can provide new avenues of attac... » read more

Challenges In Reducing Wireless Latency


A new and much faster version of Wi-Fi is beginning to infiltrate the IoT market, reducing latency that has begun to creep up as more data is generated, processed, and moved wirelessly from one device to another. An estimated 20 billion connected devices are currently in use. Over the next several years, devices will start to include faster wireless connectivity, enabling more rapid transfer... » read more

Managing Legacy In Automotive


Experts At The Table: The automotive ecosystem is in the midst of an intense evolution as OEMs and tiered providers grapple with how to deal with legacy technology while incorporating ever-increasing levels of autonomy, electrification, software defined vehicle concepts, just to name a few. Semiconductor Engineering sat down to discuss these and other related issues with Wayne Lyons, senior dir... » read more

The Cost Of EDA Data Storage And Processing Efficiency


Engineering teams are turning to the cloud to process and store increasing amounts of EDA data, but while the compute resources in hyperscale data centers are virtually unlimited, the move can add costs, slow access to data, and raise new concerns about sustainability. For complex chip designs, the elasticity of the cloud is a huge bonus. With advanced-node chips and packaging, the amount of... » read more

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