Data Centers Boost Voltage For Higher Efficiency


The power architecture used in HPC and AI data centers today is about to undergo a significant change in an effort to boost power efficiency. While voltages at the chip level will remain the same, the voltages leading to those chips will be kept higher for longer distances. This change has broad implications for DC-DC converters. The existing architecture brings AC to each rack, converts it ... » read more

Startup Tips To Get From Seed Funding To Series A, B, C


Startups are often created by experienced engineers who figure out how to solve a technical problem they are dealing with at work, or by PhD candidates in research labs before they have even started their first full-time job. Either way, getting seed money to the tune of a few million dollars is relatively easy compared to securing further rounds of funding and achieving the company’s exit go... » read more

Developing Next-Generation Integrated Optical Engines


By Susan Coleman and Emily Gerken Data demand is soaring worldwide as high-resolution video streaming, virtual reality, the Internet of Things (IoT), high-performance computing (HPC), and artificial intelligence and machine learning (AI/ML) drive an insatiable appetite for data. As a result, networks and data centers face increasing pressure to expand bandwidth, reduce latency, and lower pow... » read more

Current Problems Grow For Power Delivery


IR drop is becoming more problematic for a growing proportion of designs, an indication that the power delivery network (PDN) is not providing enough current to parts of the design when required. Unfortunately, there is no easy fix to this problem. In the past, when voltages were much higher, a small voltage droop didn't really matter. At the same time, wires were much thicker and presented ... » read more

Optimizing Optical Fiber Connections In Hyperscale Datacenters: A Simulation-Driven Approach


Hyperscale datacenters are redefining the limits of data transmission technology, driven by increasing demands for higher bandwidth, lower power consumption, and reduced latency. Through advanced simulation workflows and multiphysics integration, engineers can design, optimize, and validate optical coupling systems for next-generation datacenters. The use of Ansys Optics software for photonic c... » read more

Chip Industry Week in Review


SEMICON West was held in Phoenix this week, with presentations covering heterogeneous integration, AI, quantum, supply chain resilience, and more. Amid the buzz of the conference, some key manufacturing and test announcements were made this week: The strategic importance of the Phoenix area hub was highlighted. Amkor Technology broke ground this week on its advanced packaging and test camp... » read more

Today’s Screen Culture Puts Higher Pressure On Display Chips


Just as cathode ray tube technology has been relegated to specialist industrial and medical settings, OLED (organic light-emitting diode) is overtaking LCD (liquid crystal display) in some applications due to its superior image quality and contrast. But OLED is not a one-size-fits-all. An array of new technologies is being developed to meet consumer demand for better, brighter screens with h... » read more

Blog Review: Oct. 8


Siemens' Azat Latypov presents a stochastic-aware optical proximity correction strategy that demonstrated an order-of-magnitude reduction in the probability of stochastic defects for both SRAM and logic designs, sacrificing minor edge placement error in return for much lower failure rates. Cadence's Dimitry Pavlovsky introduces the AMBA CHI Chip-to-Chip (C2C) protocol, which extends the CHI ... » read more

Blog Review: Oct. 1


Synopsys' Chun-Soo Kim and Hoseong Kim suggest making the entire design flow local layout effect-aware to identify and address issues early and ultimately improve PPA by avoiding overly pessimistic designs. Siemens' Kirk Fabbri explores the power distribution network, focusing on power plane capacitance and how it varies with the dynamic switching characteristics of the load and dielectric c... » read more

Chip Industry Week In Review


U.S. Trade Representative Jamieson Greer warned Southeast Asian semiconductor manufacturers that they must shift production to the U.S. or face new punitive tariffs, reports the South China Morning Post. President Trump previously floated a 100% tariff on imported chips. Malaysia and other regional economies are offering large concessions and promises of U.S. goods purchases in hopes of securin... » read more

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