Chip Industry Week In Review

By The SE Staff - 15 Mar, 2024 - Comments: 0

By Adam Kovac, Karen Heyman, and Liz Allan. Europe's semiconductor footprint is growing in areas that previously had little association with chips. Silicon Box plans to build a panel-level foundry in northern Italy, funded in part by the Italian government. The deal is worth around €3.2 billion ($3.6B). In addition, imec will establish a specialized 300mm chip technology pilot line in M... » read more

Backside Power Delivery Adds New Thermal Concerns

By Karen Heyman - 14 Mar, 2024 - Comments: 0

As the semiconductor industry gears up for backside power delivery at the 2nm node, implementation of the technology requires a re-thinking of established design practices. While some EDA tools are already qualified, designers must acquaint themselves with new issues, including making place-and-route more thermal-aware and how to manage heat dissipation with less shielding and thinner substr... » read more

The Rising Price Of Power In Chips

By Ed Sperling - 14 Mar, 2024 - Comments: 0

Power is everything when it comes to processing and storing data, and much of it isn't good. Power-related issues, particularly heat, dominate chip and system designs today, and those issues are widening and multiplying. Transistor density has reached a point where these tiny digital switches are generating more heat than can be removed through traditional means. That may sound manageable e... » read more

Photonics: The Former And Future Solution

By Karen Heyman - 14 Mar, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to talk about where photonics is in the hype cycle and its secure role in data centers, with James Pond, fellow at Ansys; Gilles Lamant, distinguished engineer at Cadence; and Mitch Heins, business development manager for photonic solutions at Synopsys. What follows are excerpts of that conversation. [L-R]: Ansys’ Pond, Cadence�... » read more

How Multiphysics Simulation Enables 3D-IC Implementation At The Speed Of Light

By Ansys - 13 Mar, 2024 - Comments: 0

Electronic designers need greater integration densities and faster data transfer rates to meet the increased performance requirements of technologies like 5G/6G, autonomous driving, and artificial intelligence. The semiconductor industry is shifting toward 3D-IC design to keep up with the ever-growing demand for high-performance and power-efficient devices that has outpaced the capabilities o... » read more

Blog Review: Mar. 13

By Jesse Allen - 13 Mar, 2024 - Comments: 0

Cadence's Geeta Arora explains the Address Translation Service in PCIe 6.0, which allows an I/O device to perform its own virtual to physical address translations without relying on the host's CPU to reduce latency and improve overall system performance. Synopsys' John Swanson, Jon Ames, Priyank Shukla, and Varun Agrawal highlight the upcoming 1.6T iteration of the Ethernet standard and the ... » read more

DTCO/STCO Create Path For Faster Yield Ramps

By Laura Peters - 12 Mar, 2024 - Comments: 0

Higher density in planar SoCs and advanced packages, coupled with more complex interactions and dependencies between various components, are permitting systematic defects to escape traditional detection methods. These issues increasingly are not detected until the chips reach high-volume manufacturing, slowing the yield ramp and bumping up costs. To combat these problems, IDMs and systems co... » read more

Chip Industry Week In Review

By The SE Staff - 08 Mar, 2024 - Comments: 0

By Adam Kovac, Gregory Haley, and Liz Allan. Cadence plans to acquire BETA CAE Systems for $1.24 billion, the latest volley in a race to sell multi-physics simulation and analysis across a broad set of customers with deep pockets. Cadence said the deal opens the door to structural analysis for the automotive, aerospace, industrial, and health care sectors. Under the terms of the agreement, 6... » read more

V2X Path To Deployment Still Murky

By Ann Mutschler - 07 Mar, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss Vehicle-To-Everything (V2X) technology and the path to deployment, with Shawn Carpenter, program director for 5G and space at Ansys; Lang Lin, principal product manager at Ansys; Daniel Dalpiaz, senior manager product marketing, Americas, green industrial power division at Infineon; David Fritz, vice president of virtual and hy... » read more

Blog Review: Mar. 6

By Jesse Allen - 06 Mar, 2024 - Comments: 0

Synopsys' Gandharv Bhatara notes that successfully deploying high-NA EUV will rely on computational lithography to provide accurate modeling of aberrations, compact 3D mask modeling, and expand inverse lithography to full-chip processing. Cadence's John Park argues for using a systematic and automated system for co-design and co-analysis of multi-die packages to reduce the margin for human e... » read more

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tag: ANSYS

Chip Industry Week In Review

Backside Power Delivery Adds New Thermal Concerns

The Rising Price Of Power In Chips

Photonics: The Former And Future Solution

How Multiphysics Simulation Enables 3D-IC Implementation At The Speed Of Light

Blog Review: Mar. 13

DTCO/STCO Create Path For Faster Yield Ramps

Chip Industry Week In Review

V2X Path To Deployment Still Murky

Blog Review: Mar. 6

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