Week In Review: Manufacturing, Test


Chipmakers Intel has outlined its new process technology roadmap with plans to regain the leadership position in the market. As part of the move, Intel has changed the way it designates the nodes, revealed its new gate-all-around (GAA) transistor, and disclosed a customer for the GAA technology--Qualcomm. And not to be outdone, Intel has broadened its packaging portfolio. Intel is changing ... » read more

The Great Quantum Computing Race


Quantum computing is heating up, as a growing number of entities race to benchmark, stabilize, and ultimately commercialize this technology. As of July 2021, a group from China appears to have taken the lead in terms of raw performance, but Google, IBM, Intel and other quantum computer developers aren’t far behind. All of that could change overnight, though. At this point, it's too early t... » read more

Behind The Intel-GlobalFoundries Rumor


A Wall Street Journal report that Intel is looking to buy GlobalFoundries has sparked discussions across the industry. But what exactly this would mean, and why now versus a couple years ago, needs some context. There are layers upon layers of irony behind this would-be deal, and it dates back decades to some rather famous encounters. Consider former AMD CEO Jerry Sanders' 1991 comment that ... » read more

Week In Review: Auto, Security, Pervasive Computing


Security A new security annotation standard for hardware IP is now available for download at no cost. The board of directors of the Accellera Systems Initiative, the non-profit EDA- and IP-standards organization, approved the release of the Security Annotation for Electronic Design Integration (SA-EDI) Standard 1.0. The standard, developed by Accellera’s IP Security Assurance (IPSA) Working ... » read more

Week In Review: Manufacturing, Test


Chipmakers and OEMs More delays and product woes at Intel. “INTC disclosed that it is delaying the launch of its next-generation Xeon server processor Sapphire Rapids (10nm) from the end of this year to 1Q22 due to additional validation needed for the chip,” said John Vinh, an analyst at KeyBanc, in a research note. “Production is expected to begin in 1Q22, with the ramp expected to begi... » read more

CEO Outlook: More Data, More Integration, Same Deadlines


Experts at the Table: Semiconductor Engineering sat down to discuss the future of chip design and EDA tools with Lip-Bu Tan, CEO of Cadence; Simon Segars, CEO of Arm; Joseph Sawicki, executive vice president of Siemens IC EDA; John Kibarian, CEO of PDF Solutions; Prakash Narain, president and CEO of Real Intent; Dean Drako, president and CEO of IC Manage; and Babak Taheri, CEO of Silvaco. What ... » read more

Fan-Out Packaging Options Grow


Chipmakers, OSATs and R&D organizations are developing the next wave of fan-out packages for a range of applications, but sorting out the new options and finding the right solution is proving to be a challenge. Fan-out is a way to assemble one or more dies in an advanced package, enabling chips with better performance and more I/Os for applications like computing, IoT, networking and sma... » read more

Shifting Toward Data-Driven Chip Architectures


An explosion in data is forcing chipmakers to rethink where to process data, which are the best types of processors and memories for different types of data, and how to structure, partition and prioritize the movement of raw and processed data. New chips from systems companies such as Google, Facebook, Alibaba, and IBM all incorporate this approach. So do those developed by vendors like Appl... » read more

Pushing The Limits Of Hardware-Assisted Verification


As semiconductor complexity continues to escalate, so does the reliance on hardware-assisted simulation, emulation, and prototyping. Since chip design first began, engineers have complained their design goals exceeded the capabilities of the tools. This is especially evident in verification and debug, which continue to dominate the design cycle. Big-iron tooling has enabled design teams to k... » read more

The Increasingly Uneven Race To 3nm/2nm


Several chipmakers and fabless design houses are racing against each other to develop processes and chips at the next logic nodes in 3nm and 2nm, but putting these technologies into mass production is proving both expensive and difficult. It's also beginning to raise questions about just how quickly those new nodes will be needed and why. Migrating to the next nodes does boost performance an... » read more

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