tag: Applied Materials

Challenges Mount For Patterning And Masks
By Mark LaPedus - 06 Apr, 2015 - Comments: 0

Semiconductor Engineering sat down to discuss [getkc id="80" comment="lithography"] and photomask trends with Uday Mitra, vice president and chief technology officer for the Etch Business Unit at [getentity id="22817" e_name="Applied Materials"]; Pawitter Mangat, senior manager and deputy director for EUV lithography at [getentity id="22819" comment="GlobalFoundries"]; Aki Fujimura, chief execu... » read more

Challenges Mount For Patterning And Masks
By Mark LaPedus - 30 Mar, 2015 - Comments: 0

Semiconductor Engineering sat down to discuss lithography and photomask trends with Uday Mitra, vice president and chief technology officer for the Etch Business Unit at [getentity id="22817" e_name="Applied Materials"]; Pawitter Mangat, senior manager and deputy director for EUV lithography at [getentity id="22819" comment="GlobalFoundries"]; Aki Fujimura, chief executive at [getentity id="228... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 27 Mar, 2015 - Comments: 0

Intel is in talks to buy Altera, according to The Wall Street Journal. If a deal is reached, Intel would enter the FPGA market amid a slowdown in its core processors business. Intel would also secure its largest foundry customer in Altera. For years, Altera’s sole foundry was TSMC. Then, not long ago, Altera selected Intel as its foundry partner for 14nm. TSMC still handles 20nm and above wor... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 20 Mar, 2015 - Comments: 0

For years, Altera’s sole foundry was TSMC. Then, not long ago, Altera selected Intel as its foundry partner for 14nm. TSMC still handles 20nm and above work for Altera. Now, Altera will soon select a foundry partner for 10nm. “Altera will make a decision on which foundry partner it will choose for 10nm finFET at the end of 1Q15, noting it will decide between Intel and TSMC,” said John Vin... » read more

Searching For 3D Metrology
By Mark LaPedus - 19 Mar, 2015 - Comments: 3

In the previous decade, chipmakers made a bold but necessary decision to select the [getkc id="185" kc_name="finFET"] as the next transistor architecture for the IC industry. Over time, though, chipmakers discovered that the finFET would present some challenges in the fab. Deposition, etch and lithography were the obvious hurdles, but chipmakers also saw a big gap in metrology. In fact,... » read more

Challenges Mount For Patterning And Masks
By Mark LaPedus - 19 Mar, 2015 - Comments: 0

Semiconductor Engineering sat down to discuss lithography and photomask trends with Uday Mitra, vice president and chief technology officer for the Etch Business Unit at [getentity id="22817" e_name="Applied Materials"]; Pawitter Mangat, senior manager and deputy director for EUV lithography at [getentity id="22819" comment="GlobalFoundries"]; Aki Fujimura, chief executive at [getentity id="228... » read more

Issues And Options At 5nm
By Mark LaPedus - 19 Mar, 2015 - Comments: 0

While the foundries are ramping up their processes for the 16nm/14nm node, vendors are also busy developing technologies for 10nm and beyond. In fact, chipmakers are finalizing their 10nm process offerings, but they are still weighing the technology options for 7nm. And if that isn’t enough, IC makers are beginning to look at the options at 5nm and beyond. Today, chipmakers can see a p... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 13 Mar, 2015 - Comments: 0

Look out below! Intel has lowered its first-quarter revenue outlook. The company now expects first-quarter revenue to be $12.8 billion, plus or minus $300 million, compared to the previous expectation of $13.7 billion, plus or minus $500 million. “Intel may be experiencing greater-than-expected seasonal declines in both notebooks and desktops,” said Doug Freedman, an analyst with RBC Capita... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 06 Mar, 2015 - Comments: 0

EUV lithography remains a mixed bag, according to analysts. "We are downgrading shares of ASML to 'Sector Perform' from 'Outperform' as we think shares appear fully valued based on midterm lithography demand and our view that meaningful EUV adoption is still several years out," said Weston Twigg, an analyst with Pacific Crest Securities, in a new report. "We think the reality is that it is not ... » read more

Blog Review: March 4
By Jesse Allen - 04 Mar, 2015 - Comments: 0

Is gate-level simulation still necessary? Mentor's Gordon Allan asserts it is, and gives a list of reasons why the pain is worth the peace of mind. Synopsys' Aron Pratt concludes his series on parameterization strategies with a process that allows the testbench to make use of parameterized interfaces without imposing limits on VIP access. Should you use EUV or quadruple patterning for 7nm... » read more

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