Week In Review: Design, Low Power


Tools and IP Renesas introduced a new microprocessor that enables artificial intelligence to process image data from multiple cameras. "One of the challenges for embedded systems developers who want to implement machine learning is to keep up with the latest AI models that are constantly evolving,” said Shigeki Kato, Vice President of Renesas' Enterprise Infrastructure Business Division. �... » read more

Verification Methodologies Evolve, But Slowly


Semiconductor Engineering sat down to discuss digital twins and what is required to develop and verify new chips across a variety of industries, such as automotive and aerospace, with Larry Lapides, vice president of sales for Imperas Software; Mike Thompson, director of engineering for the verification task group at OpenHW; Paul Graykowski, technical marketing manager for Arteris IP; Shantanu ... » read more

Blog Review: Sept. 28


Cadence's Paul McLellan shares more highlights from the recent Hot Chips, including some very large chips and accelerators for AI and deep learning, new networks and switches, and mobile and edge processors. Synopsys' Marc Serughetti considers the different use cases for digital twins in automotive and how they can help determine the impact of software on verification, test, and validation a... » read more

Technical Paper Roundup: Sept 27


New technical papers added to Semiconductor Engineering’s library this week. [table id=53 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit f... » read more

Strengthening The Global Semi Supply Chain


Within the semiconductor ecosystem, there are a number of dynamics pointing to the need for new ways of partnering in more meaningful ways that bring resiliency to the global semiconductor supply chain. One of these is the move to bespoke silicon, stemming from a shift in the companies that create most SoCs today -- the hyperscalar cloud providers. These market leaders know their workloads so w... » read more

Blog Review: Sept. 21


Arm's Neil Burgess and Sangwon Ha explain why they've joined Intel and Nvidia in proposing a new 8-bit floating point specification to enable neural network models developed on one platform to be run on other platforms without encountering the overhead of having to convert the vast amounts of model data between formats while reducing task loss to a minimum. Synopsys' Manuel Mota examines ver... » read more

Why Geofencing Will Enable L5


What will it take for a car to be able to drive itself anywhere a human can? Ask autonomous vehicle experts this question and the answer invariably includes a discussion of geofencing. In the broadest sense, geofencing is simply a virtual boundary around a physical area. In the world of self-driving cars, it describes a crucial subset of the operational design domain — the geographic regio... » read more

FP8: Cross-Industry Hardware Specification For AI Training And Inference (Arm, Intel, Nvidia)


Arm, Intel, and Nvidia proposed a specification for an 8-bit floating point (FP8) format that could provide a common interchangeable format that works for both AI training and inference and allow AI models to operate and perform consistently across hardware platforms. Find the technical paper titled " FP8 Formats For Deep Learning" here. Published Sept 2022. Abstract: "FP8 is a natural p... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive and mobility U.S. President Joe Biden announced the approval of $900 million in funding for a nationwide network of electrical vehicle charging stations in 35 states. The money is part of a multi-year, $7.5 billion plan to create 500,000 charging stations along federal highways. Industry executives told Reuters that remote human supervisors may be a permanent fixture of highly au... » read more

Week In Review: Design, Low Power


Cadence unveiled a big data analytics infrastructure to unify massive data sets across all Cadence computational software. The Joint Enterprise Data and AI (JedAI) Platform aims to optimize multiple runs of multiple engines across an entire SoC design and verification flow. It combines data from its AI-driven Cerebrus implementation and Optimality system optimization solutions, along with the n... » read more

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