Week In Review: Design, Low Power

By Jesse Allen - 12 Jul, 2019 - Comments: 0

Synopsys unveiled the latest version of its IC Compiler II place-and-route system, adding a common physical optimization infrastructure, new arc-based unified concurrent clock-and-data (CCD) optimization, physically-aware logic re-synthesis, and dynamic voltage drop-driven power shaping. Additionally, next-generation distributed parallelization, intelligent scenario management, efficient infras... » read more

Week in Review: IoT, Security, Auto

By Jeff Dorsch - 12 Jul, 2019 - Comments: 0

Products/Services Arteris IP reports that Bitmain licensed the Arteris Ncore Cache Coherent Interconnect intellectual property for use in its next-generation Sophon Tensor Processing Unit system-on-a-chip devices for the scalable hardware acceleration of artificial intelligence and machine learning algorithms. “Our choice of interconnect IP became more important as we continued to increase t... » read more

Edge Complexity To Grow For 5G

By Kevin Fogarty and Ed Sperling - 02 Jul, 2019 - Comments: 0

Edge computing is becoming as critical to the success of 5G as millimeter-wave technology will be to the success of the edge. In fact, it increasingly looks as if neither will succeed without the other. 5G networks won’t be able to meet 3GPP’s 4-millisecond-latency rule without some layer to deliver the data, run the applications and broker the complexities of multi-tier Internet apps ac... » read more

Application Driven Network On Chip Architecture Exploration And Refinement For A Complex SoC

By Arteris - 01 Jul, 2019 - Comments: 0

This white paper summarizes the various features a NoC is required to implement to be integrated in modern SoCs, describes a top-down approach based on the progressive refinement of the NoC description from its functional specification (Sect. 4) to its verification (Sect. 8), and it uses use cases to show how to identify bottlenecks and converge towards the NoC implementation. To read more, ... » read more

Week In Review: Design, Low Power

By Jesse Allen - 28 Jun, 2019 - Comments: 0

VESA published the DisplayPort 2.0 standard, which allows for a max payload of 77.37 Gbps, a 3X increase in data bandwidth performance compared to DisplayPort 1.4a. The latest release also includes capabilities to address beyond 8K resolutions, higher refresh rates and HDR support at higher resolutions, multiple display configurations, and support for 4K-and-beyond VR resolutions. It is backwar... » read more

Week in Review: IoT, Security, Auto

By Jeff Dorsch - 28 Jun, 2019 - Comments: 0

Products/Services Visa agreed to acquire the token and electronic ticketing business of Rambus for $75 million in cash. The business involved is part of the Smart Card Software subsidiary of Rambus. It includes the former Bell ID mobile-payment businesses and the Ecebs smart-ticketing systems for transit providers. Meanwhile, Rambus expanded its CryptoManager Root of Trust product line. “Sec... » read more

Week in Review – IoT, Security, Auto

By Jeff Dorsch - 21 Jun, 2019 - Comments: 0

Products/Services Arteris IP reports Achronix Semiconductor licensed the Arteris FlexNoC interconnect IP for its new Speedster7t line of FPGAs. Speedster7t features ASIC-like performance, FPGA adaptability, and enhanced functionality to streamline design. "Our new Speedster7t FPGA family requires extremely high on-chip bandwidth and advanced dataflow arbitration to make possible ASIC-class mac... » read more

Week In Review: Design, Low Power

By Jesse Allen - 21 Jun, 2019 - Comments: 0

ON Semiconductor completed its $946 million acquisition of Quantenna Communications, a San Jose-based company that specializes in Wi-Fi chips and software. Aldec introduced automatic UVM register generation to its Riviera-PRO verification platform. Riviera-PRO can now accept a CSV file or IP-XACT register description as an input and, working at the Register Abstraction Layer (RAL) of UVM, ou... » read more

Week in Review: IoT, Security, Auto

By Jeff Dorsch - 14 Jun, 2019 - Comments: 0

Products/Services Mentor, a Siemens Business, announced the release of the final phase of the Valor software New Product Introduction design-for-manufacturing technology, automating printed circuit board design reviews. The company has integrated DFM technology into the Xpedition software layout application. Arteris IP reports that Toshiba has taped out its next-generation advanced driv... » read more

Week In Review: Design, Low Power

By Jesse Allen - 14 Jun, 2019 - Comments: 0

M&A Intel will acquire Barefoot Networks, a maker of programmable Ethernet switch silicon and the P4 networking programming language for data centers. Founded in 2013, the Santa Clara-based company has raised $155.4 million in funding. Terms of the deal were not disclosed, but Intel expects the acquisition to be final in the third quarter of this year. Tools & IP Mentor extended it... » read more

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Knowledge Centers
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tag: Arteris IP

Week In Review: Design, Low Power

Week in Review: IoT, Security, Auto

Edge Complexity To Grow For 5G

Application Driven Network On Chip Architecture Exploration And Refinement For A Complex SoC

Week In Review: Design, Low Power

Week in Review: IoT, Security, Auto

Week in Review – IoT, Security, Auto

Week In Review: Design, Low Power

Week in Review: IoT, Security, Auto

Week In Review: Design, Low Power