Abstractions: The Good, Bad And Ugly

By Ed Sperling - 27 Feb, 2014 - Comments: 0

Raising the level of abstraction has become almost a mantra among chipmakers and tools developers. By moving the vantage point up a couple rungs on the ladder, it’s easier to see how the individual parts of a design go together, to identify problems in the design as well as fixes to problems, and it all can happen much more quickly. That’s the theory, at least. And in most cases, it’s ... » read more

Time to mend the EE / CS divide

By Kurt Shuler - 27 Feb, 2014 - Comments: 0

There’s been a lot of news out the last few weeks about the future of our industry, and although these news flashes may seem unrelated, they are quite correlated. First, there was the disturbing news in Mark LaPedus’ article here on Semiconductor Engineering, “EUV Suffers New Setback,” portending a rough ride for the commercialization of EUV lithography. EUV will be needed to create ... » read more

Is Verification At A Crossroads?

By Ann Mutschler - 27 Feb, 2014 - Comments: 1

As SoC verification methodologies and technologies have continued to mature, it’s an interesting time for engineering teams as they look to meet time to market goals and cut costs in an environment of cutthroat profit margins. Whether it is hardware emulation, FPGA prototyping, virtual prototyping or traditional software simulation, each platform has its strengths and drawbacks, with overl... » read more

The Week In Review: Design

By Ed Sperling - 21 Feb, 2014 - Comments: 0

Synopsys inked a deal to acquire Coverity, a San Francisco-based security startup that builds tools to test source code for defects and security risks, for $375 million. The purchase price is $350 million plus another $25 million in debt. The deal is expected to close in Synopsys’ fiscal Q2. The company announced its financial results for fiscal Q1 ended Jan. 31, as well. Revenue was $479.0 m... » read more

Blog Review: Feb. 5

By Ed Sperling - 05 Feb, 2014 - Comments: 0

Mentor’s J. VanDomelen notes that the Mars colonization selection process has begun, with the actual colonization scheduled to begin in 2025. Remember to bring your own air, water, food, a sewing kit, and lots of reading material. You also may need leg weights for bone density maintenance. What happens if you build a processor using memory as the starting point? Cadence’s Richard Goerin... » read more

The Uncertain Future Of Fabless Semis

By Ann Mutschler - 30 Jan, 2014 - Comments: 1

As with most things, perspective is everything, this is especially true when it comes to changes in the semiconductor ecosystem. Some industry watchers say indicators clearly point to a shift happening where system OEMs again make the decisions about what is in a chip, both software and hardware, pointing to Apple, Samsung, Microsoft and Intel as prime examples. As a result, the fabless semicon... » read more

Patents Under Scrutiny

By Brian Bailey - 30 Jan, 2014 - Comments: 2

After years of complaints by high-tech companies that the U.S. patent system is misused, too slow or completely outdated, patent attorneys are about to get their day in court. The U.S. Supreme Court has agreed to review an appeal between Alice Corp., an electronic marketplace for trading IP, and CLS Bank International, involving what kinds of inventions can be patented, according to the Supr... » read more

Internet Of Things Hype: The Sound And The Fury

By Kurt Shuler - 30 Jan, 2014 - Comments: 2

“It is a tale told by an idiot, full of sound and fury, signifying nothing.” —William Shakespeare, Macbeth Bill was referring to life in the above quote, but he may as well have been referring to the hype surrounding the Internet of Things (IoT) and how it is going to create a new era of innovation in the semiconductor industry. I’m skeptical, and I will tell you why. We’ve bee... » read more

Week In Review: System-Level Design

By Ed Sperling - 17 Jan, 2014 - Comments: 0

Cadence rolled out a new version of its functional verification platform, greatly improving performance and updating it to deal with the big increases in third-party and re-used IP in designs. For IP and block verification, the company said it increased formal analysis performance by up to 20% and simulation by up to 10 times. The debugger also reduces the database size by 10 times and the time... » read more

Performance Still Trumps Power

By Brian Bailey - 16 Jan, 2014 - Comments: 2

When it comes to technology, the past was always simpler than the present and the future looks daunting. In part, this is because finding a solution to a problem allows us to discover the next problem. Over time, the previous problem becomes more understood and solutions improve to the point where it is no longer considered a problem. It was a fairly easy choice about how to implement functiona... » read more

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