Still Waiting For III-V Chips


For years, chipmakers have been searching for an alternative material to replace traditional silicon in the channel for advanced CMOS devices at 7nm and beyond. There’s a good reason, too: At 7nm, silicon will likely run out of steam in the channel. Until recently, chipmakers were counting on III-V materials for the channels, at least for NFET. Compared to silicon, III-V materials provide ... » read more

Searching For The Next Power Transistor


For decades, the industry has relied on various power semiconductors to control and convert electrical power in an efficient manner. Power semis are ubiquitous, as they are found in adapters, appliances, cars, elevators, switching power supplies, power grids and other systems. But today’s silicon-based power semiconductor transistor technologies, such as IGBTs, MOSFETs and thyristors, are ... » read more

What’s Next For Memory?


Apple, Samsung and others are developing the next wave of smartphones and tablets. OEMs want to integrate new memory schemes that provide more bandwidth at lower power. But there are some challenges in the arena that are prompting memory makers to rethink their mobile DRAM roadmaps. The conventional wisdom was that memory makers would ship mobile DRAMs based on the new LPDDR4 interface stand... » read more

Atomic Layer Etch Finally Emerges


The migration towards finFETs and other devices at the 20nm node and beyond will require a new array of chip-manufacturing technologies. Multiple patterning, hybrid metrology and newfangled interconnect schemes are just a few of the technologies required for future scaling. In addition, the industry also will require new techniques that can process structures at the atomic level. For example... » read more

New Challenges For Post-Silicon Channel Materials


In order to bring alternative channel materials into the CMOS mainstream, manufacturers need not just individual transistor devices, but fully manufacturable process flows. Work presented at the recent IEEE Electron Device Meeting (Washington, D.C., Dec. 9-11, 2013) showed that substantial work remains to be done on almost all aspects of such a flow. First and most fundamentally, it is diffi... » read more

Manufacturing Bits: Nov. 19


Toothpick Fab Tools NASA's Goddard Space Flight Center in Greenbelt, Md. has developed a specialized atomic layer deposition (ALD) system and a "virtual toothpick" to enable ultra-thin films on chips and systems. NASA has built an ALD reactor chamber, which measures three inches in diameter and two feet in length. The system can deposit films inside pores and cavities, giving ALD the abilit... » read more

The Week In Review: Sept. 23


By Mark LaPedus For some time, Apple’s iPhones have incorporated a separate RF switch and diversity switch from Peregrine Semiconductor (PSMI). The switches are based on a silicon-on-insulator (SOI) variant called silicon-on-sapphire (SOS). Murata takes Peregrine’s RF switches and integrates them into a module. Doug Freedman, an analyst with RBC Capital, said Apple is no longer using PSMI�... » read more

Manufacturing Bits: Sept. 10


Rock Around The Clock National Institute of Standards and Technology’s two experimental atomic clocks have set a new record for stability. Resembling a pendulum or metronome, NIST’s atomic clocks can swing back and forth with perfect timing for a period comparable to the age of the universe. The clocks are based on ytterbium atoms. The clock ticks are stable to within less than two part... » read more

Manufacturing Bits: July 23


Space Tubes In 2011, NASA produced a material that absorbs on average more than 99% of the ultraviolet, visible, infrared, and far-infrared light that hits it. NASA’s so-called “super-black” material is based on a thin layer of multi-walled carbon nanotubes. Tiny gaps between the nanotubes collect and trap light. The carbon absorbs the photons, preventing them from reflecting off surf... » read more

Challenges Mount For Interconnect


By Mark LaPedus There are a plethora of chip-manufacturing challenges for the 20nm node and beyond. When asked what are the top challenges facing leading-edge chip makers today, Gary Patton, vice president of the Semiconductor Research and Development Center at IBM, said it boils down to two major hurdles: lithography and the interconnect. The problems with lithography are well documented.... » read more

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