Novel Thin Film Growth Technique Of A WBG Sulfide Semiconductor in BEOL Compatible Conditions (USC, LBNL, TSMC)


A new technical paper titled "Textured growth and electrical characterization of Zinc Sulfide on back-end-of-the-line (BEOL) compatible substrates" was published by researchers at USC, Lawrence Berkeley National Laboratory and TSMC. Abstract "Scaling of transistors has enabled continuous improvements in logic device performance, especially through materials engineering. However, surpassing ... » read more

Impact of Scaling and BEOL Technology Solutions At The 7nm Node On MRAM


A technical paper titled “Impact of Technology Scaling and Back-End-of-the-Line Technology Solutions on Magnetic Random-Access Memories” was published by researchers at Georgia Institute of Technology. Abstract: "While magnetic random-access memories (MRAMs) are promising because of their nonvolatility, relatively fast speeds, and high endurance, there are major challenges in adopting the... » read more

Challenges Mount For Interconnect


By Mark LaPedus There are a plethora of chip-manufacturing challenges for the 20nm node and beyond. When asked what are the top challenges facing leading-edge chip makers today, Gary Patton, vice president of the Semiconductor Research and Development Center at IBM, said it boils down to two major hurdles: lithography and the interconnect. The problems with lithography are well documented.... » read more