ML-Assisted IC Test Binning With Real-Time Prediction At The Edge


IC Test is a critical part of semiconductor manufacturing and proper die binning and material disposition has an important impact on the overall yield and on the process monitoring and failure mode diagnostics. Edge analytics are becoming an increasingly important aspect of die disposition. By intercepting parts in real-time at the wafer test step, we can save downstream processing needs. In th... » read more

Test Connections Clean Up With Real-Time Maintenance


Test facilities are beginning to implement real-time maintenance, rather than scheduled maintenance, to reduce manufacturing costs and boost product yield. Adaptive cleaning of probe needles and test sockets can extend equipment lifetimes and reduce yield excursions. The same is true for load board repair, which is moving toward predictive maintenance. But this change is much more complicate... » read more

Data-driven RRAM device models using Kriging interpolation


New technical paper from The George Washington University and NIST with support from DARPA and others. Abstract "A two-tier Kriging interpolation approach is proposed to model jump tables for resistive switches. Originally developed for mining and geostatistics, its locality of the calculation makes this approach particularly powerful for modeling electronic devices with complex behavior la... » read more

Strategies For Meeting Stringent Standards For Automotive ICs


It may surprise you, but when it comes to chips in electronic braking systems, airbag control units, and more, automotive manufacturers are still using 10-year-old technology — and with good reason. For the automotive industry, the reliability, stability, and robustness of electronic components are critical, especially when it comes to meeting the stringent Automotive Electronics Council (... » read more

Preventing Chips From Burning Up During Test


It’s become increasingly difficult to manage the heat generated during IC test. Absent the proper mitigations, it’s easy to generate so much heat that probe cards and chips literally can burn up. As a result, implementing temperature-management techniques is becoming a critical part of IC testing. “We talk about systems, saying the system is good,” said Arun Krishnamoorthy, senior... » read more

Testing More To Boost Profits


Not all chips measure up to spec, but as more data becomes available and the cost of these devices continues to rise, there is increasing momentum to salvage and re-purpose chips for other applications and markets. Performance-based binning is as old as color-banded resistors, but the practice is spreading — even for the most advanced nodes and packages. Over the last three decades, engine... » read more

Adaptive Test Gains Ground


Not all devices get tested the same way anymore, and that’s a good thing. Quality, test costs, and yield have motivated product engineers to adopt test processes that fall under the umbrella of adaptive test, which uses test data to modify a subsequent test process. But to execute such techniques requires logistics that support analysis of data, as well as enabling changes to a test based ... » read more

Early And Fine Virtual Binning


Not all chips are created equal, and this is viewed as both a blessing and a curse by semiconductor makers. On one hand, chips can be screened for certain attributes, and some of the chips can be sold for higher prices than others. On the other hand, variations in the production process cause silicon performance to greatly differ, leaving chip makers with a wide and somewhat unpredictable distr... » read more

Grading Chips For Longer Lifetimes


Figuring out how to grade chips is becoming much more difficult as these chips are used in applications where they are supposed to last for decades rather than just a couple of years. During manufacturing, semiconductors typically are run through a battery of tests involving performance and power, and then priced accordingly. But that is no longer a straightforward process for several reason... » read more

Yield Impact For Wafer Shape Misregistration-Based Binning For Overlay APC Diagnostic Enhancement


By David Jayez, Kevin Jock, Yue Zhou and Venugopal Govindarajulu of GlobalFoundries, and Zhen Zhang, Fatima Anis, Felipe Tijiwa-Birk and Shivam Agarwal of KLA. 1. ABSTRACT The importance of traditionally acceptable sources of variation has started to become more critical as semiconductor technologies continue to push into smaller technology nodes. New metrology techniques are needed to pur... » read more