Cracking The Auto IC Market


The market for automotive electronics is booming, and it has set off a global scramble among established chipmakers and startups. What's becoming clear, though, is that not everyone understands just how different automotive is from the mobile market. Mobile is still the highest-volume market for semiconductors, but the growth has flattened. In contrast, the value of the automotive electronic... » read more

Is Software Necessary?


Hardware must be capable of running any software. While that might have been a good mantra when chips were relatively simple, it becomes an impossible verification task when dealing with SoCs that contain dozens of deeply embedded processors. When does it become necessary to use production software and what problems can that get you into? When verification targets such as power are added, it... » read more

Verification As A Flow


Semiconductor Engineering sat down to discuss the transformation of verification from a tool to a flow with Vladislav Palfy, global manager application engineering for OneSpin Solutions; Dave Kelf, chief marketing officer for Breker Verification Systems; Mark Olen, product marketing group manager for Mentor, A Siemens Business; Larry Melling, product management director, System & Verificati... » read more

Safety, Security And PPA Tradeoffs


Safety and security are emerging as key design tradeoffs as chips are added into safety-critical markets, adding even more complexity into an already complicated optimization process. In the early days of semiconductor design, performance and area were traded off against each other. Then power became important, and the main tradeoffs became power, performance and area (PPA). But as chips inc... » read more

Week In Review: Design, Low Power


M&A Siemens acquired Austemper Design Systems, which provides tools for functional safety and safety-critical designs. Founded in 2015, Texas-based Austemper adds state-of-the-art safety analysis, auto-correction and fault simulation technology to address random hardware faults, as well as correct and harden vulnerable areas, subsequently performing fault simulation to ensure the design is... » read more

The Week In Review: Design


M&A MIPS has reportedly been acquired again, this time by AI startup Wave Computing. Wave focuses on data center-based neural network training using its parallel dataflow processing architecture. In March, the company signed on to use 64-bit multi-threaded processor cores from MIPS in future projects. Previously, MIPS was owned by Tallwood Venture Capital, which acquired MIPS from Imaginat... » read more

Get Ready For Verification 3.0


Jim Hogan, managing partner of Vista Ventures, LLC, is perhaps the best-known investor in the EDA space. Recently, he has been focusing time and attention on verification startups, including cloud technology company Metrics, and Portable Stimulus pioneer Breker Verification Systems. This adds to his longer-term commitment to formal verification with OneSpin Solutions. These companies are part ... » read more

The Week In Review: Design


Tools Mentor, a Siemens business, filled in the last of the hardware configurations for its Veloce Strato emulation family, creating a full upgrade path. Users can initially purchase only the hardware that they need (StratoTiL) and if later they require more capacity (StratoTi) or the ability to handle larger designs (StratoT), they can incrementally add the necessary hardware to their existin... » read more

The Week In Review: Design


M&A Synopsys acquired PhoeniX Software, expanding its photonic integrated circuit design range. Founded in 2003 and based in the Netherlands, PheoniX adds photonic aware physical layout capabilities, enabled by support for foundry-specific PDKs, along with a full photonic chip design package. Terms of the deal were not disclosed. Siemens PLM Software will acquire Sarokal Test Systems, w... » read more

The Week In Review: Design


M&A Verific acquired Invionics' entire INVIO technology portfolio, adding a high-level scripting interface with 100 high-level APIs to its Parser Platform of approximately 2,000 low-level SystemVerilog and VHDL APIs. An R&D group from the company will also join Verific. Portable Stimulus An Early Adopter release of the Portable Stimulus specification has been made publicly availabl... » read more

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