Etch Processes Push Toward Higher Selectivity, Cost Control

By Laura Peters - 18 May, 2023 - Comments: 0

Plasma etching is perhaps the most essential process in semiconductor manufacturing, and possibly the most complex of all fab operations next to photolithography. Nearly half of all fab steps rely on a plasma, an energetic ionized gas, to do their work. Despite ever-shrinking transistor and memory cells, engineers continue to deliver reliable etch processes. “To sustainably create chips... » read more

Photonic Debond: Scalability And Advancements

By Brewer Science - 17 May, 2023 - Comments: 0

Advanced packaging technology has continuously evolved over the past 10-20 years to become a major driving force in improving integrated circuit (IC) performance. This improvement in IC performance is assisted by the ability to place specialized components near each other for shorter interconnects in the IC packages. Temporary bond and debond (TB/DB) is an enabling technique for this work. TB/D... » read more

Week In Review: Semiconductor Manufacturing, Test

By Karen Heyman - 28 Apr, 2023 - Comments: 0

The U.S. Commerce Department launched Chips.gov, a website that covers all aspects of the CHIPS Act, including funding opportunities and job openings. In similar vein, Intel CEO Pat Gelsinger focused on the future of semiconductor manufacturing in America in a talk at MIT. Intel has committed to expanding semiconductor manufacturing in the U.S., including spending an initial $20 billion on ne... » read more

Week In Review: Semiconductor Manufacturing, Test

By Gregory Haley - 21 Apr, 2023 - Comments: 0

GlobalFoundries filed suit in U.S. District Court in New York against IBM, accusing it of unlawfully disclosing IP and trade secrets to IBM partners, including Intel and Rapidus, potentially receiving hundreds of millions of dollars in licensing income and other benefits. The European Union released a €43 billion ($47 billion) plan for jumpstarting its semiconductor manufacturing industry,... » read more

Assist Layers: The Unsung Heroes of EUV Lithography

By Katherine Derbyshire - 20 Apr, 2023 - Comments: 0

Most discussions of advanced lithography focus on three elements — the exposure system, photomasks, and photoresists — but that's only part of the challenge. Successfully transferring a pattern from the photomask to a physical structure on the wafer also depends on a variety of films working together, including the underlayers, the developers, and a variety of surface treatments. In fact... » read more

Tech Forecast: Fab Processes To Watch Through 2040

By Laura Peters - 16 Mar, 2023 - Comments: 0

The massive proliferation of semiconductors in more markets, and more applications within those markets, is expected to propel the industry to more than $1 trillion by 2030. But over the next 17 years, semiconductors will reach well beyond the numbers, changing the way people work, how they communicate, and how they measure and monitor their health and well-being. Chips will be the enabling ... » read more

Process Innovations Enabling Next-Gen SoCs and Memories

By Laura Peters - 20 Feb, 2023 - Comments: 0

Achieving improvements in performance in advanced SoCs and packages — those used in mobile applications, data centers, and AI — will require complex and potentially costly changes in architectures, materials, and core manufacturing processes. Among the options under consideration are new compute architectures, different materials, including thinner barrier layers and those with higher th... » read more

Managing Thermal-Induced Stress In Chips

By Karen Heyman - 16 Feb, 2023 - Comments: 0

At advanced nodes and in the most advanced packages, physics is no one's friend. Escalating density, smaller features, and thinner dies make it more difficult to dissipate heat, and they increase mechanical stress. On the flip side, thinner dielectrics and tighter spaces make it more difficult to insulate and protect against that heat, and in conjunction with those smaller features and higher d... » read more

Week In Review: Semiconductor Manufacturing, Test

By Karen Heyman - 10 Feb, 2023 - Comments: 0

Chips for consumer devices are down, but the overall chip industry is actively preparing for the next phase of growth. Worldwide silicon wafer shipments, which are an aggregate view of all the various semiconductor segments, hit an all-time high in 2022, increasing 4% to 14,713 million square inches (MSI). Wafer revenue, meanwhile, rose 9.5% to $13.8 billion over the same period, SEMI reported ... » read more

The Path To Known Good Interconnects

By Laura Peters - 19 Jan, 2023 - Comments: 1

Chiplets and heterogenous integration (HI) provide a compelling way to continue delivering improvements in performance, power, area, and cost (PPAC) as Moore’s Law slows, but choosing the best way to connect these devices so they behave in consistent and predictable ways is becoming a challenge as the number of options continues to grow. More possibilities also bring more potential interac... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: Brewer Science

Etch Processes Push Toward Higher Selectivity, Cost Control

Photonic Debond: Scalability And Advancements

Week In Review: Semiconductor Manufacturing, Test

Week In Review: Semiconductor Manufacturing, Test

Assist Layers: The Unsung Heroes of EUV Lithography

Tech Forecast: Fab Processes To Watch Through 2040

Process Innovations Enabling Next-Gen SoCs and Memories

Managing Thermal-Induced Stress In Chips

Week In Review: Semiconductor Manufacturing, Test

The Path To Known Good Interconnects