tag: Cadence

Advancing the Future of Hearing Aids
By Cadence - 05 Jun, 2024 - Comments: 0

Hearing, one of the fundamental senses, profoundly affects our ability to communicate, engage with our environment, and maintain connections with others. Despite the long-standing presence of hearing aids in the market, accessibility to essential hearing aids has historically lagged, leaving many individuals isolated due to untreated hearing. According to the World Health Organization (WHO), ov... » read more

Blog Review: June 5
By Jesse Allen - 05 Jun, 2024 - Comments: 0

Cadence's Neelabh Singh provides an overview of the low power entry and exit flows in USB4 Version 2.0 link speed and how they have been simplified by making low power entry uni-directional and removing the need for certain handshakes for low power exit of the re-timers. In a podcast, Siemens' Steph Chavez chats with Daniel Beeker of NXP about the foundational importance of power distributio... » read more

Why IC Design Safety Nets Have Limits
By Ann Mutschler and Adam Kovac - 04 Jun, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss different responsibilities in design teams and future changes in tools with Ashish Darbari, CEO at Axiomise; Ziyad Hanna, corporate vice president R&D at Cadence; Jim Henson, ASIC verification software product manager at Siemens EDA; Dirk Seynhaeve, vice president of business development at Sigasi; Simon Davidmann, formerly... » read more

Chip Design Digs Deeper Into AI
By Ann Mutschler - 03 Jun, 2024 - Comments: 0

Growing demand for blazing fast and extremely dense multi-chiplet systems are pushing chip design deeper into AI, which increasingly is viewed as the best solution for sifting through scores of possible configurations, constraints, and variables in the least amount of time. This shift has broad implications for the future of chip design. In the past, collaborations typically involved the chi... » read more

AI-Powered Data Analytics To Revolutionize The Semiconductor Industry
By Reela Samuel - 30 May, 2024 - Comments: 1

In the age where data reigns supreme, the semiconductor industry stands on the cusp of revolutionary change, redefining complexity and productivity through a lens crafted by artificial intelligence (AI). The intersection of AI and the semiconductor industry is not merely an emerging trend—it is the fulcrum upon which the next generation of technological innovation balances. Semiconductor comp... » read more

AI For Data Management
By Adam Kovac - 30 May, 2024 - Comments: 0

Data management is becoming a significant new challenge for the chip industry, as well as a brand new opportunity, as the amount of data collected at every step of design through manufacturing continues to grow. Exacerbating the problem is the rising complexity of designs, many of which are highly customized and domain-specific at the leading edge, as well as increasing demands for reliabili... » read more

Trouble Ahead For IC Verification
By Brian Bailey - 30 May, 2024 - Comments: 0

Verification complexity is roughly the square of design complexity, but until recently verification success rates have remained fairly consistent. That's beginning to change. There are troubling signs that verification is collapsing under the load. The first-time success rate fell (see figure 1) in the last survey conducted by Wilson Research, on behalf of Siemens EDA, in 2022. A new survey ... » read more

Steady and Unsteady Full-Engine Simulations
By Cadence - 29 May, 2024 - Comments: 0

Discover the power of fully coupled steady and unsteady full-engine simulations. Say goodbye to traditional component-by-component methods. This innovative approach seamlessly integrates all engine components into a single, cohesive simulation framework, offering unparalleled accuracy and efficiency for aero-engine simulations. Key Takeaways: Steady and Time-Accurate: Achieve superio... » read more

Blog Review: May 22
By Jesse Allen - 22 May, 2024 - Comments: 0

Cadence's Sree Parvathy introduces Verilog-A, a high-level language that uses modules to describe the structure and behavior of analog systems and enables the top-down system to be defined before the actual transistor circuits are assembled. Siemens' Keith Felton suggests the process of package substrate design is improved by leveraging the collective expertise of multiple design domain spec... » read more

Chip Aging Becoming Key Factor In Data Center Economics
By Ann Mutschler - 20 May, 2024 - Comments: 1

Chip aging is becoming a much bigger concern inside of data centers, where it can impact server uptime, utilization rates, and the amount of energy needed to drive signals and cool entire server racks. Aging in chips is the result of both higher logic utilization and increasing transistor density. This is problematic for data centers, in general, but especially for AI chips where digital log... » read more

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