tag: Cadence

Week In Review: Semiconductor Manufacturing, Test
By Karen Heyman - 02 Dec, 2022 - Comments: 0

With the European Council’s adoption of its negotiating mandate for the European Chips Act, member states and the Czech Presidency of the Council have reached a critical milestone in supporting Europe’s efforts to advance manufacturing and supply of critical components, while bolstering R&D capacities for development of next-generation semiconductor innovations, according to SEMI. Ch... » read more

Week In Review: Design, Low Power
By Marie C. Baca - 02 Dec, 2022 - Comments: 0

Tools and IP Renesas released a family of configurable clock generators with an internal crystal oscillator for PCIe and networking applications in high-end computing, wired infrastructure and data center equipment. “Timing needs can vary greatly between different applications and equipment, and often change during a product design cycle,” said Zaher Baidas, Vice President of the Timing Pr... » read more

Smart Manufacturing: What’s Needed For The Industrial Intelligence Revolution?
By Ben Gu - 01 Dec, 2022 - Comments: 0

Smart manufacturing – the use of nascent technology within the industrial Internet of things (IIoT) to address traditional manufacturing challenges – is leading a supply chain revolution, resulting in smart, connected, and intelligent environments, capable of self-operation and self-healing. While factory automation has been around for decades, smart manufacturing goes a great deal furth... » read more

Blog Review: Nov. 30
By Jesse Allen - 30 Nov, 2022 - Comments: 0

Cadence's Sangeeta Soni explores how the configuration space for CXL 1.1 and CXL 2.0 varies and discusses newly introduced registers for the CXL-compliant devices and how they are discovered during the CXL enumeration flow. Siemens EDA's Harry Foster continues examining trends in FPGA verification effort by looking at where both design and verification engineers spend their time. Synopsys... » read more

Improving Concurrent Chip Design, Manufacturing, And Test Flows
By Ann Mutschler - 28 Nov, 2022 - Comments: 0

Semiconductor design, manufacturing, and test are becoming much more tightly integrated as the chip industry seeks to optimize designs using fewer engineers, setting the stage for greater efficiencies and potentially lower chip costs without just relying on economies of scale. The glue between these various processes is data, and the chip industry is working to weave together various steps t... » read more

Blog Review: Nov. 23
By Jesse Allen - 23 Nov, 2022 - Comments: 0

Siemens EDA's Harry Foster looks at multiple data points to get a sense of effort spent in FPGA verification and increasing demand for FPGA verification engineers. Synopsys' Rimpy Chugh, Himanshu Kathuria, and Rohit Kumar Ohlayan argue that the quality of the design and testbench code is critical to a project’s success and that linting offers a comprehensive checking process for teams to s... » read more

Tempus Timing Signoff Solution
By Cadence - 23 Nov, 2022 - Comments: 0

The Cadence Tempus Timing Signoff Solution is the fastest static timing analysis (STA) tool in the industry today with unique distributed processing and cloud capabilities enabling hundreds of CPUs to quickly complete even the largest designs. With full foundry certification and a comprehensive set of advanced capabilities, the Tempus solution delivers SPICE-accurate results to hundreds... » read more

Is UCIe Really Universal?
By Brian Bailey - 22 Nov, 2022 - Comments: 3

Chiplets are rapidly becoming the means to overcome the slowing of Moore's Law, but whether one interface is capable of joining them all together isn't clear yet. The Universal Chiplet Interconnect Express (UCIe) believes it will work, but some in the industry remain unconvinced. At least part of the problem is that interconnect standards are never truly finished. Even today, the protocols tha... » read more

Effective Measurement Is The Key To Meeting Environmental Sustainability Goals In Data Centers
By Neil Zaman - 22 Nov, 2022 - Comments: 0

Hyperscale compute, using high-performance connected processors, continually transforms our lives as more and more applications rely on this type of compute, and at the heart of this hyperscale revolution are data centers. It is estimated that an equal amount of power is required for the airflow and cooling systems as for IT equipment. The pressure is on for organizations to create and adopt l... » read more

The Drive Toward Virtual Prototypes
By Brian Bailey - 22 Nov, 2022 - Comments: 1

Chipmakers are piling an increasing set of demands on virtual prototypes that go well beyond its original scope, forcing EDA companies to significantly rethink models, abstractions, interfaces, view orthogonality, and flows. The virtual prototype has been around for at least 20 years, but its role has been limited. It has largely been used as an integration and analysis platform for models t... » read more

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