Verification Methodologies Evolve, But Slowly

By Brian Bailey - 29 Sep, 2022 - Comments: 0

Semiconductor Engineering sat down to discuss digital twins and what is required to develop and verify new chips across a variety of industries, such as automotive and aerospace, with Larry Lapides, vice president of sales for Imperas Software; Mike Thompson, director of engineering for the verification task group at OpenHW; Paul Graykowski, technical marketing manager for Arteris IP; Shantanu ... » read more

Blog Review: Sept. 28

By Jesse Allen - 28 Sep, 2022 - Comments: 0

Cadence's Paul McLellan shares more highlights from the recent Hot Chips, including some very large chips and accelerators for AI and deep learning, new networks and switches, and mobile and edge processors. Synopsys' Marc Serughetti considers the different use cases for digital twins in automotive and how they can help determine the impact of software on verification, test, and validation a... » read more

Toward Domain-Specific EDA

By Brian Bailey - 26 Sep, 2022 - Comments: 0

More companies appear to be creating custom EDA tools, but it is not clear if this trend is accelerating and what it means for the mainstream EDA industry. Whenever there is change, there is opportunity. Change can come from new abstractions, new options for optimization, or new limitations that are imposed on a tool or flow. For example, the slowing of Moore's Law means that sufficient prog... » read more

Week In Review: Design, Low Power

By Marie C. Baca - 23 Sep, 2022 - Comments: 0

Quantum The $3 million Breakthrough Prize in Fundamental Physics was awarded to four pioneers in the field of quantum information. The laureates are Charles H. Bennett, Gilles Brassard, David Deutsch and Peter Shor. Bennett and Brassard were part of the team that proved the usefulness of entanglement, while Deutsch defined the quantum version of a Turing machine. Shor invented the first "clear... » read more

Strengthening The Global Semi Supply Chain

By Ann Mutschler - 22 Sep, 2022 - Comments: 0

Within the semiconductor ecosystem, there are a number of dynamics pointing to the need for new ways of partnering in more meaningful ways that bring resiliency to the global semiconductor supply chain. One of these is the move to bespoke silicon, stemming from a shift in the companies that create most SoCs today -- the hyperscalar cloud providers. These market leaders know their workloads so w... » read more

Holistic 3D-IC Interposer Analysis In Product Designs

By Ben Gu - 22 Sep, 2022 - Comments: 1

The miniaturization trend in electronic devices and the rise in smart and IoT device segments make adopting heterogeneous integration of chip components or 3D-ICs a viable option for miniaturization and better interconnection. This vertical stacking of ICs enables the next generation of sophisticated, intelligent devices, necessitating high chip density and terabytes of bandwidth. As per the f... » read more

How Memory Design Optimizes System Performance

By John Koon - 21 Sep, 2022 - Comments: 0

Exponential increases in data and demand for improved performance to process that data has spawned a variety of new approaches to processor design and packaging, but it also is driving big changes on the memory side. While the underlying technology still looks very familiar, the real shift is in the way those memories are connected to processing elements and various components within a syste... » read more

Efficient Verification Of Mixed-Signal Series IP Using UVM

By Cadence - 21 Sep, 2022 - Comments: 0

Interface IP are an integral part of systems-on-chips (SoC) that include mobile, automotive, or networking applications and are primarily used for transmitting data over a physical medium between a host and device. The mixed-signal nature of the IP makes verification a challenging task, requiring special considerations for digital and analog sections. This paper describes a robust mixed-signal ... » read more

Blog Review: Sept. 21

By Jesse Allen - 21 Sep, 2022 - Comments: 0

Arm's Neil Burgess and Sangwon Ha explain why they've joined Intel and Nvidia in proposing a new 8-bit floating point specification to enable neural network models developed on one platform to be run on other platforms without encountering the overhead of having to convert the vast amounts of model data between formats while reducing task loss to a minimum. Synopsys' Manuel Mota examines ver... » read more

10 Questions: Handel Jones

By Ed Sperling - 20 Sep, 2022 - Comments: 0

Handel Jones, CEO of International Business Strategies and author of a new book, "When AI Rules The World," sat down with Semiconductor Engineering to talk about the growth and impact of AI. What follows are excerpts of that conversation. SE: What do you see as the impact of AI on semiconductors? Jones: The fact that you have a 5G smart phone is because of AI. Steve Jobs changed the smart... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

Legacy Process Nodes Going Strong

The critical, and growing, significance of mature node chips and processes.

by Bryon Moyer

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?