tag: chip design

Revolution By Evolution: Getting To The Next Technology Breakthrough In Analog Simulation
By Cadence - 12 Jun, 2019 - Comments: 0

Recent technology developments, advanced-node adoptions, and Moore than Moore designs have forced analog and custom IC designers to adopt new design practices that benefit from these advancements. These changes have resulted in the need to simulate larger designs with more post-layout parasitics. In addition, many custom IC designs such as flash memory, MRAM, sensor arrays, etc., now require SP... » read more

Choosing the Right Photonic Design Software
By Synopsys - 12 Jun, 2019 - Comments: 0

There are many factors to consider before deciding which photonic design software to use. To narrow the field, it can be helpful to ask these key questions as you investigate and compare software functionality. • Does the software provide enough flexibility to model and analyze products that offer the best solution to likely and possible design goals? • Is the simulation capable of pr... » read more

CEO Outlook: It Gets Much Harder From Here
By Ed Sperling - 03 Jun, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss what's changing across the semiconductor industry with Wally Rhines, CEO emeritus at Mentor, a Siemens Business; Jack Harding, president and CEO of eSilicon; John Kibarian, president and CEO of PDF Solutions; and John Chong, vice president of product and business development for Kionix. What follows are excerpts of that discussion, which was held in... » read more

Week In Review: Design, Low Power
By Jesse Allen - 31 May, 2019 - Comments: 0

M&A NXP will acquire Marvell's Wi-Fi Connectivity business in an all-cash, asset transaction valued at $1.76 billion. The deal includes the Wi-Fi and Bluetooth technology portfolios and related assets; the business employs approximately 550 people worldwide. The deal is expected to close by calendar Q1 2020. Tools Cadence unveiled a data center-optimized FPGA-based prototyping system, ... » read more

Incremental System Verification
By Brian Bailey - 16 May, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss the implications of having an executable specification that drives verification with Hagai Arbel, chief executive officer for VTool; Adnan Hamid, chief executive office for Breker Verification; Mark Olen, product marketing manager for Mentor, a Siemens Business; Jim Hogan, managing partner of Vista Ventures; Sharon Rosenberg, senior solutions archit... » read more

The Growing Uncertainty Of Sign-Off At 7/5nm
By Ann Mutschler - 09 May, 2019 - Comments: 3

Having enough confidence in designs to sign off prior to manufacturing is becoming far more difficult at 7/5nm. It is taking longer due to increasing transistor density, thinner gate oxides, and many more power-related operations that can disrupt signal integrity and impact reliability.  For many years, designers have performed design rule checks as part of physical verification of the desi... » read more

Raising The Abstraction Level For Power
By Brian Bailey - 09 May, 2019 - Comments: 0

Power-aware design is still a relatively new concern for many semiconductor products, and since inception it has changed several times and in different ways. Initially people were concerned about peak power. Today, they care about peak, total energy, thermal and other effects. The industry has tried several abstractions ranging from system-level analysis, which promised to swamp implementati... » read more

The Rising Importance Of Design Planning
By Jim Schultz - 09 May, 2019 - Comments: 0

Design Planning is often overlooked in the chip design flow. The front-end designer carefully architects the design functionality to produce golden RTL. This is then poured into the synthesis engine to produce logic gates. The synthesized netlist is then thrown over the wall by the front-end designer for physical implementation. The back-end designer receives a gate-level netlist, timing con... » read more

Selecting A Portable Stimulus Application Focal Point
By Mentor, a Siemens Business - 08 May, 2019 - Comments: 0

The "axes of reuse" are a powerful way to identify a focal point for your application of Portable Stimulus. Picking a focal point helps to identify needed resources and identify the gap between what is needed and what already exists in your organization. Picking an initial focal point for applying Portable Stimulus doesn’t preclude expanding the application of Portable Stimulus in the future.... » read more

DAC: An Exhibitor’s Perspective
By Diana Dearin - 08 May, 2019 - Comments: 0

It is less than four weeks to DAC. At this point you should be deep into your planning and ready to drop down secure all your exhibit services before the deadline. While you are thinking about how to manage all the details of getting your booth on the show floor, this is a great time to take a step back and make sure you have clearly defined exhibit “takeaways” — think “goals” and ... » read more

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