Chip-Package-Board Issues Grow

As systems migrate from a single die in a single package on a board, to multiple dies with multiple packaging options and multiple PCB form factors, it is becoming critical to move system planning, assembly, and optimization much earlier in the design-through-manufacturing flow. This is easier said than done. Multiple tools and operating systems are now used at each phase of the flow, partic... » read more

Model Extraction And Circuit Simulation Approaches For Successful SSO Analysis Of Chip-Package-Board Systems

This paper concerns guidelines to support successful SSO analysis for Chip-Package- Board systems. The procedures detailed address extraction and circuit simulation application of high node-count (N>100) frequency domain models. The focus of this paper is the low frequency portion, including DC, of the spectrum for broadband S- parameters. Frequency domain model extraction options and transient... » read more

Reducing Cost And Mitigating Risk

By Aveek Sarkar & Lawrence Williams How will you design your next generation of products and keep pace with rapidly evolving market needs, while managing your margins? Many industries face these same design challenges. The speed of new product development—especially for meeting complex new design requirements—has never been more demanding. Historically, the rise in product development ... » read more

Signal Integrity’s Growing Complexity

By Matt Elmore While in the market for a memory upgrade recently, I was surprised by the availability of commercial DDR memories. You can get 8GB of DDR3 memory, transferring 17GB/s, relatively inexpensively. The progress in memory design is outstanding. From smartphones to gaming PCs, quick communication between the IC and off-chip memory is key to enabling the performance we demand in the... » read more