Analysis Of Multi-Chiplet Package Designs And Requirements For Production Test Simplification

By Vineet Pancholi - 21 Nov, 2024 - Comments: 1

In recent years there has been a sharp rise of multi-die system designs. Numerous publications targeting a large variety of applications exist in the public domain. One presentation [2] on the IEEE’s website does a good job of detailing the anecdotal path of multi-die systems by way of chiplet building blocks integrated within a single package [2]. The presentation includes references to a ha... » read more

New Tradeoffs In Leading-Edge Chip Design

By Katherine Derbyshire - 21 Nov, 2024 - Comments: 0

Device design begins with the anticipated workload. What is it actually supposed to do? What resources — computational units, memory, sensors — are available? Answering these questions and developing the functional architecture are the first steps in a new design — well before committing it to silicon, said Tim Kogel, senior director of technical product management at Synopsys. Yet eve... » read more

One Chip Vs. Many Chiplets

By Ed Sperling - 20 Nov, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss the growing list of challenges at advanced nodes and in advanced packages, with Jamie Schaeffer, vice president of product management at GlobalFoundries; Dechao Guo, director of advanced logic technology R&D at IBM; Dave Thompson, vice president at Intel; Mustafa Badaroglu, principal engineer at Qualcomm; and Thomas Ponnusw... » read more

Shift Left Is The Tip Of The Iceberg

By Brian Bailey - 14 Nov, 2024 - Comments: 1

Shift left is evolving from a buzzword into a much broader shift in design methodology and EDA tooling, and while it's still early innings there is widespread agreement that it will be transformative. The semiconductor industry has gone through many changes over the past few decades. Some are obvious, but others happen because of a convergence of multiple factors that require systemic change... » read more

Chiplets for Future Automotive Application

By Fraunhofer IIS/EAS - 13 Nov, 2024 - Comments: 0

Abstract Autonomous vehicles and associated ADAS systems are driving vehicle electronics content to unprecedented levels. These systems require significant processing power via a centralized system. Chiplets are one solution to distribute functionality on different technologies and can help to secure the supply chain and reduce rising development costs in advanced IC nodes. This traditionally ... » read more

Innovate Faster with A Multi-Die Solution

By Synopsys - 13 Nov, 2024 - Comments: 0

The semiconductor industry is experiencing a monumental shift in chip design, driven by the dramatic increase in AI compute performance requirements and limitations of Moore’s Law. The industry is adopting multi-die designs, which is the heterogeneous or homogeneous integration of dies (also called chiplets) in a single package. While multi-die design is the solution, it also introduces se... » read more

Systems-in-Package: Authenticated Partial Encryption Protocol For Secure Testing (U. of Florida)

By Technical Paper Link - 12 Nov, 2024 - Comments: 0

A new technical paper titled "GATE-SiP: Enabling Authenticated Encryption Testing in Systems-in-Package" was published by researchers at University of Florida and University of Central Florida. Abstract: "A heterogeneous integrated system in package (SIP) system integrates chiplets outsourced from different vendors into the same substrate for better performance. However, during post-integra... » read more

Yield Management Embraces Expanding Role

By Laura Peters - 12 Nov, 2024 - Comments: 0

Competitive pressures, shrinking time-to-market windows, and increased customization are collectively changing the dynamics and demands for yield management systems, shifting left from the fab to the design flow and right to assembly, packaging, and in-field analysis. The basic role of yield management systems is still expediting new product introductions, reducing scrap, and delivering grea... » read more

Chip Industry Week In Review

By The SE Staff - 08 Nov, 2024 - Comments: 0

Analog Devices acquired Flex Logix's technology assets, along with its technical team. Semiconductor global sales increased 23% in Q3 2024 $166B, up almost 11% versus the same period in 2023, according to SIA. Notable regional year-to-year sales in September: Americas up 46%, China up 23%, Europe down 8%. Fig.1: Worldwide Semiconductor Revenues, year-to-year % change. Source: Semiconduc... » read more

Workload-Specific Data Movements Across AI Workloads in Multi-Chiplet AI Accelerators

By Technical Paper Link - 04 Nov, 2024 - Comments: 0

A new technical paper titled "Communication Characterization of AI Workloads for Large-scale Multi-chiplet Accelerators" was published by researchers at Universitat Politecnica de Catalunya. Abstract "Next-generation artificial intelligence (AI) workloads are posing challenges of scalability and robustness in terms of execution time due to their intrinsic evolving data-intensive characteris... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: chiplets

Analysis Of Multi-Chiplet Package Designs And Requirements For Production Test Simplification

New Tradeoffs In Leading-Edge Chip Design

One Chip Vs. Many Chiplets

Shift Left Is The Tip Of The Iceberg

Chiplets for Future Automotive Application

Innovate Faster with A Multi-Die Solution

Systems-in-Package: Authenticated Partial Encryption Protocol For Secure Testing (U. of Florida)

Yield Management Embraces Expanding Role

Chip Industry Week In Review

Workload-Specific Data Movements Across AI Workloads in Multi-Chiplet AI Accelerators