Holistic 3D-IC Interposer Analysis In Product Designs


The miniaturization trend in electronic devices and the rise in smart and IoT device segments make adopting heterogeneous integration of chip components or 3D-ICs a viable option for miniaturization and better interconnection. This vertical stacking of ICs enables the next generation of sophisticated, intelligent devices, necessitating high chip density and terabytes of bandwidth. As per the f... » read more

10 Questions: Handel Jones


Handel Jones, CEO of International Business Strategies and author of a new book, "When AI Rules The World," sat down with Semiconductor Engineering to talk about the growth and impact of AI. What follows are excerpts of that conversation. SE: What do you see as the impact of AI on semiconductors? Jones: The fact that you have a 5G smart phone is because of AI. Steve Jobs changed the smart... » read more

How To Compare Chips


Traditional metrics for semiconductors are becoming much less meaningful in the most advanced designs. The number of transistors packed into a square centimeter only matters if they can be utilized, and performance per watt is irrelevant if sufficient power cannot be delivered to all of the transistors. The consensus across the chip industry is that the cost per transistor is rising at each ... » read more

What Is UCIe?


The semiconductor industry is undertaking a major strategy shift towards multi-die systems. The shift is fueled by several converging trends: Size of monolithic SoCs is becoming too big for manufacturability Some SoC functionalities may require different process nodes for optimal implementation Desire for enhanced product scalability and composability is increasing Multi-die syste... » read more

Microelectronics For Quantum Technologies


By Kay-Uwe Giering and Andy Heinig The transition of the quantum mechanics realm into engineering applications is opening up a large number of disruptive quantum technological opportunities. Their success relies on the recent technological advancements, which enable the controlled creation of individual quantum mechanical systems as well as their direct manipulation and measurement. Quantum ... » read more

Enabling Test Strategies For 2.5D, 3D Stacked ICs


Improved testability, coupled with more tests at more insertion points, are emerging as key strategies for creating reliable, heterogeneous 2.5D and 3D designs with sufficient yield.  Many changes need to fall into place to make side-by-side 2.5D and 3D stacking approaches cost-effective, particularly for companies looking to integrate chiplets from different vendors. Today, nearly all of t... » read more

Heterogeneous IC Packaging: Optimizing Performance And Cost


Leading integrated circuit (IC) foundries are already shipping 7-nm and 5-nm wafers and 3-nm product qualifications are ongoing. Wafer costs continue to soar as high transistor density requires ever more expensive processes to fabricate them. Even if defect densities can remain relatively flat as new nodes emerge, the cost per unit area of silicon increases nonlinearly. These economics have pla... » read more

Securing Heterogeneous Integration at the Chiplet, Interposer, and System-In-Package Levels (FICS-University of Florida)


A new research paper titled "ToSHI - Towards Secure Heterogeneous Integration: Security Risks, Threat Assessment, and Assurance" was published by researchers at the Florida Institute for Cybersecurity (FICS) Research, University of Florida. Abstract "The semiconductor industry is entering a new age in which device scaling and cost reduction will no longer follow the decades-long pattern. Pa... » read more

Week In Review: Manufacturing, Test


The U.S. Congress approved the CHIPS Act, a mammoth bipartisan achievement the New York Times called “the most significant government intervention in industrial policy in decades.” As passed, the full package — now called the Chips and Science Act — contains $52 billion in direct assistance for the semiconductor industry, along with $24 billion in tax incentives. In addition, the bill c... » read more

Distilling The Essence Of Four DAC Keynotes


Chip design and verification are facing a growing number of challenges. How they will be solved — particularly with the addition of machine learning — is a major question for the EDA industry, and it was a common theme among four keynote speakers at this month's Design Automation Conference. DAC has returned as a live event, and this year's keynotes involved the leaders of a systems comp... » read more

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