tag: chiplets

Top Tech Talks Of 2018
By Linda Christensen - 31 Dec, 2018 - Comments: 0

2018 shaped up to be a year of transition and inflection, sometimes in the same design. There were new opportunities in automotive, continued difficulties in scaling, and an explosion in AI and machine learning everywhere. Traffic numbers on stories give a snapshot of the most current trends, but with videos those trends are even more apparent because of the time invested in watching those v... » read more

Security, Scaling and Power
By Ed Sperling - 13 Dec, 2018 - Comments: 0

If anyone has doubts about the slowdown and increasing irrelevance of Moore's Law, Intel's official unveiling of its advanced packaging strategy should leave little doubt. Inertia has ended and the roadmap is being rewritten. Intel's discussion of advanced packaging is nothing new. The company has been public about its intentions for years, and started dropping hints back when Pat Gelsinger ... » read more

Packaging Biz Faces Challenges in 2019
By Mark LaPedus - 10 Dec, 2018 - Comments: 0

The IC packaging industry is bracing for slower growth, if not uncertainty, in 2019, even though advanced packaging remains a bright spot in the market. Generally, IC packaging houses saw strong demand in the first part of 2018, but the market cooled in the second half of the year due to a slowdown in memory. Going forward, the slower IC packaging market is expected to extend into the first ... » read more

The Case For Chiplets
By Ed Sperling - 10 Dec, 2018 - Comments: 0

Kandou’s Amin Shokrollahi looks at what’s behind the momentum for a LEGO-like approach, where the challenges are, and how the cost compares with other approaches. https://youtu.be/7QHEeagdLzk     ___________________________________ Find more tech talk videos here .   » read more

Getting Down To Business On Chiplets
By Ed Sperling - 26 Nov, 2018 - Comments: 0

Government agencies, industry groups and individual companies are beginning to rally around various chiplet models, setting the stage for complex chips that are quicker and cheaper to build using standardized interfaces and components. The idea of putting together different modules like LEGOs has been talked about for the better part of a decade. So far, only Marvell has used this concept co... » read more

Die-to-Die Interconnects for Chip Disaggregation
By Mondeep Thiara - 10 Nov, 2018 - Comments: 0

Today, data growth is at an unprecedented pace. We’re now looking at petabytes of data moving into zettabytes. What that translates to is the need for considerably more compute power and much more bandwidth to process all that data. In networking, high-speed SerDes PHYs represent the linchpin for blazing fast back and forth transmission of data in data centers. In turn, demand is increa... » read more

Die-To-Die Interconnects For Chip Disaggregation
By Mondeep Thiara - 09 Nov, 2018 - Comments: 0

Today, data growth is at an unprecedented pace. We’re now looking at petabytes of data moving into zettabytes. What that translates to is the need for considerably more compute power and much more bandwidth to process all that data. In networking, high-speed SerDes PHYs represent the linchpin for blazing fast back and forth transmission of data in data centers. In turn, demand is increasin... » read more

Design For Advanced Packaging
By Brian Bailey - 08 Nov, 2018 - Comments: 0

Advanced packaging techniques are viewed as either a replacement for Moore's Law scaling, or a way of augmenting it. But there is a big gap between the extensive work done to prove these devices can be manufactured with sufficient yield and the amount of attention being paid to the demands advanced packaging has on the design and verification flows. Not all advanced packaging places the same... » read more

Blog Review: Oct. 31
By Jesse Allen - 31 Oct, 2018 - Comments: 0

Mentor's Joe Hupcey III digs into handling memories effectively with formal through abstraction and the easiest ways to address memory-related inconclusive results. Cadence's Paul McLellan explains DARPA's CHIPS program that aims to lower semiconductor design costs through chiplet-based designs, the current status of the work, and what the next steps will be. Synopsys' Sangeeta Kulkarni c... » read more

From Physics To Applications
By Ed Sperling - 25 Oct, 2018 - Comments: 0

Jack Harding, president and CEO of eSilicon, sat down with Semiconductor Engineering to talk about the shift toward AI and advanced packaging, and the growing opportunities at 7nm at a time when Moore's Law has begun slowing down. What follows are excerpts of that conversation. SE: Over the past year, the industry has changed its focus from shrinking features and consolidation to all sorts o... » read more

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