Latency, Interconnects, And Poker

By Ed Sperling - 20 Feb, 2024 - Comments: 0

Semiconductor Engineering sat down with Larry Pileggi, Coraluppi Head and Tanoto Professor of Electrical and Computer Engineering at Carnegie Mellon University, and the winner of this year's Phil Kaufman Award for Pioneering Contributions. What follows are excerpts of that conversation. SE: When did you first get started working in semiconductors — and particularly, EDA? Pileggi: This w... » read more

Rapid Prototyping For Emerging Semiconductor Devices

By Technical Paper Link - 03 Jan, 2024 - Comments: 0

A technical paper titled “Generating Predictive Models for Emerging Semiconductor Devices” was published by researchers at TU Darmstadt and NaMLab. Abstract: "Circuit design requires fast and scalable models which are compatible to modern electronic design automation tools. For this task typically analytical compact models are preferred. However, for emerging device concepts with altered ... » read more

GAA NSFETs: ML for Device and Circuit Modeling

By Technical Paper Link - 30 Nov, 2023 - Comments: 0

A new technical paper titled "A Comprehensive Technique Based on Machine Learning for Device and Circuit Modeling of Gate-All-Around Nanosheet Transistors" was published by researchers at National Yang Ming Chiao Tung University. Abstract (excerpt) "Machine learning (ML) is poised to play an important part in advancing the predicting capability in semiconductor device compact modeling domai... » read more

Search Based Method For Identifying Aging Model Parameters

By Technical Paper Link - 24 Jun, 2023 - Comments: 0

A technical paper titled “Leveraging Public Information to Fit a Compact Hot Carrier Injection Model to a Target Technology” was published by researchers at University of Victoria. Abstract: "The design of countermeasures against integrated circuit counterfeit recycling requires the ability to simulate aging in CMOS devices. Electronic design automation tools commonly provide this ability... » read more

The Complex Art Of Handling S-Parameters

By Pradeep Thiagarajan - 12 Sep, 2022 - Comments: 1

By Pradeep Thiagarajan and Youssef Abdelkader IC design is transforming at an accelerated pace along with fabrication technology. The need to incorporate more functionality has led to denser dies, multi-die chips, stacked 3D ICs, and advanced packaging. Furthermore, the increasing demand for enhanced connectivity with more and faster access to data continues to drive technology towards highe... » read more

Cloud-Ready Circuit Simulation Accelerates SoC Verification

By Nebabie Kebebew - 15 Aug, 2022 - Comments: 0

By Nebabie Kebebew and Nigel Bleasdale Driven by the explosion of big data and expanding applications, chip design complexity is increasing. Applications such as high-performance computing (HPC), the Internet of Things (IoT), automotive, and 5G mobile and communications coupled with advanced process technology nodes require running a large number of circuit simulations to ensure the circuits... » read more

The Reliability Of Analog Integrated Circuits And Their Simulation-Aided Verification

By Andre Lange - 19 Jul, 2022 - Comments: 0

Different challenges have to be overcome when designing integrated circuits. Besides schematic and layout design work, verification in view of the non-ideal behavior of circuits and semiconductor technologies in particular is also relevant. The designed circuits have to work at specific operating voltages and within ambient temperature ranges and be robust in terms of process fluctuations ... » read more

Designing and Simulating Low-Voltage CMOS Circuits Using Four-Parameter Model

By Technical Paper Link - 20 Jun, 2022 - Comments: 0

New technical paper titled "Bridging the Gap between Design and Simulation of Low-Voltage CMOS Circuits" from researchers at Federal University of Santa Catarina, Brazil. Abstract "This work proposes a truly compact MOSFET model that contains only four parameters to assist an integrated circuits (IC) designer in a design by hand. The four-parameter model (4PM) is based on the advanced com... » read more

Accelerating Circuit Simulation 10x With GPUs

By Samad Parekh - 10 Mar, 2022 - Comments: 0

By Samad Parekh (Synopsys) and Srinivas Kodiyalam (NVIDIA) Many aspects of semiconductor design and verification have an ever-growing “need for speed” that has outpaced the performance improvements available by running on CPUs. Electronic design automation (EDA) companies have responded by creating smarter software algorithms to improve simulation time, sometimes at the expense of relaxe... » read more

The Physics Of Ports And Associated Ground For EM Simulators Serving RF Designs

By Cadence - 09 Dec, 2021 - Comments: 0

The use of ports in electromagnetic (EM) simulators has evolved and matured over the years to make real-world design simulations practical. Having a foundational understanding of ports provides an intuitive skill in their proper selection and use in conjunction with circuit simulation. In this white paper, we examine ports common to EM simulators, which are the most common simulators for microw... » read more

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Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

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by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.